From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BF50E7E0BA for ; Mon, 9 Feb 2026 09:57:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA03F10E3B4; Mon, 9 Feb 2026 09:57:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="TkaWu855"; dkim-atps=neutral Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6525810E3B4 for ; Mon, 9 Feb 2026 09:57:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1770631060; x=1802167060; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=2eXSGPP5bHZvIZVUTzZbcAndWWo39uIzV1dzMrzYILw=; b=TkaWu855B/NIlQKec+sFPTvKFucOmj1eTJwqrDS3OTU7n6RkhmkgLh5V kY3llYCMvTj6Uv9TonC9d7FYx1JSoeBMCF5ViMwF9F5guxCKPVypHgj/q w77fU2R8WX5O1JxRaGYiZKs0r0tEnOOPOi4+ks0yKK6watB77jIQbZd+v i1kpOUE1GKuVe90Cq5fF/6mZ6H8pO9jm8OXvESCHd7XbecrWpnMhIE1I4 R3ZedBq3q/wGpyEmBnkIs0WK7TQa3fIW+iUCtoOEwdck3Inbem4vTpyi0 PODIDKNBh274h4KlSBXiMGebBB18Az5ZYzXg4j1Q4KTaI3CiKbSD1i7m+ w==; X-CSE-ConnectionGUID: ndl2L5WnRr+m1f1i6lcTaw== X-CSE-MsgGUID: Zd5JlMiSTzm2GrUaENqJnw== X-IronPort-AV: E=Sophos;i="6.21,281,1763449200"; d="scan'208";a="60386962" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2026 02:57:40 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Mon, 9 Feb 2026 02:57:13 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 9 Feb 2026 02:57:10 -0700 From: Cyrille Pitchen Date: Mon, 9 Feb 2026 10:56:44 +0100 Subject: [PATCH v7 1/5] dt-bindings: gpu: add bindings for the Microchip GFX2D GPU MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260209-cpitchen-mainline_gfx2d-v7-1-0c12e64a0950@microchip.com> References: <20260209-cpitchen-mainline_gfx2d-v7-0-0c12e64a0950@microchip.com> In-Reply-To: <20260209-cpitchen-mainline_gfx2d-v7-0-0c12e64a0950@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1828; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=2eXSGPP5bHZvIZVUTzZbcAndWWo39uIzV1dzMrzYILw=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ2bn+txsQR7G7+Wz3TY7G3jJGe6adyvIv/vw83tBa6cac Cccv3e0o5SFQYyLQVZMkeXQm629mcdfPbZ7JSoFM4eVCWQIAxenAExknxDDP+2+VftqXpftujTX NcQr70dvzu9zJx/p2ogsrEt2UZO5dISRoVPWbefbxw4cp/ZMO3vrzafCntbfLNNnFE+su+F5/0D Mcx4A X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Microchip GFX2D GPU is embedded in the SAM9X60 and SAM9X7 SoC family. Describe how the GFX2D GPU is integrated in these SoCs, including register space, interrupt and clock. Acked-by: Conor Dooley Reviewed-by: Nicolas Ferre Signed-off-by: Cyrille Pitchen --- .../bindings/gpu/microchip,sam9x60-gfx2d.yaml | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.yaml b/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.yaml new file mode 100644 index 0000000000000000000000000000000000000000..1c0faef83900e5771746032f1ad6fa9388f16da1 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/microchip,sam9x60-gfx2d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip GFX2D GPU + +maintainers: + - Cyrille Pitchen + +properties: + compatible: + enum: + - microchip,sam9x60-gfx2d + - microchip,sam9x7-gfx2d + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + gpu@f0018000 { + compatible = "microchip,sam9x60-gfx2d"; + reg = <0xf0018000 0x100>; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; + }; + +... -- 2.51.0