[PATCH 0/5] drm/imagination: add support for j721e,j784s4,j722s,am62p

[PATCH 0/5] drm/imagination: add support for j721e,j784s4,j722s,am62p

[Antonios Christidis]

Hello all,

Some TI/IMG dts GPU nodes are not present upstream, while others are. This
series adds support for missing devices upstream.

Including patches ([1][2]) from Michael Walle, that did not get picked up.
That add support j722s and am62p.

In regards to the j721e patch:

The clock[3] and power[4] info was captured from docs listed below.  While
interrupt info was captured from [5], TI downstream binding in commit
6ae5ecfde2f2 ("arm64: dts: ti: k3-j721e-main: add gpu node").

In regards to the j784s4 patch:

The clock[6] and power[7] info was captured from docs listed below.  While
interrupt info was captured from [8], looking at "Interrupts (inputs)" and
"GPU_BXS464_WRAP0_GPU_SS_0_OS_IRQ_OUT_0".

[1]: https://lore.kernel.org/all/20251223124729.2482877-3-mwalle@kernel.org/
[2]: https://lore.kernel.org/all/20251223124729.2482877-4-mwalle@kernel.org/
[3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html#clocks-for-gpu0-gpu-0-device
[4]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721e/devices.html
[5]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
[6]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html#clocks-for-j7aep-gpu-bxs464-wrap0-gpu-ss-0-device
[7]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j784s4/devices.html
[8]: https://www.ti.com/lit/zip/spruj52

Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
Antonios Christidis (3):
      arm64: dts: ti: k3-j721e: Add GPU node
      dt-bindings: gpu: img: Add J721e SoC specific compatible
      arm64: dts: ti: k3-j784s4: Add GPU node

Michael Walle (2):
      arm64: dts: ti: add GPU node
      clk: keystone: don't cache clock rate

 .../devicetree/bindings/gpu/img,powervr-rogue.yaml         |  7 ++++++-
 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 11 +++++++++++
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi                  | 14 ++++++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi                 | 14 ++++++++++++++
 drivers/clk/keystone/sci-clk.c                             |  8 ++++++++
 5 files changed, 53 insertions(+), 1 deletion(-)
---
base-commit: 3ef088b0c5772a6f75634e54aa34f5fc0a2c041c
change-id: 20260224-gpu_dts-ab32c568d756

Best regards,
-- 
Antonios Christidis <a-christidis@ti.com>

[PATCH 1/5] arm64: dts: ti: k3-j721e: Add GPU node

[Antonios Christidis]

Add the series 8XE GPU node for j721e device tree.

Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index d5fd30a01032..be91e7a2afe5 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -2624,6 +2624,20 @@ icssg1_mdio: mdio@32400 {
 		};
 	};
 
+	gpu: gpu@4e20000000 {
+		compatible = "ti,j721e-gpu", "img,img-ge8430", "img,img-rogue";
+		reg = <0x4e 0x20000000 0x00 0x80000>;
+		clocks = <&k3_clks 125 0>;
+		clock-names = "core";
+		assigned-clocks = <&k3_clks 125 0>;
+		assigned-clock-rates = <750000000>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>,
+				<&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+		dma-coherent;
+	};
+
 	main_mcan0: can@2701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x02701000 0x00 0x200>,

-- 
2.34.1

Claude review: arm64: dts: ti: k3-j721e: Add GPU node

[Claude Code Review Bot]

Patch Review

**Author:** Antonios Christidis

This adds the Series 8XE (GE8430) GPU node for the J721E SoC.

**Ordering issue:** This patch uses the `"ti,j721e-gpu"` compatible string, but the dt-binding adding this compatible doesn't come until patch 2. Per kernel convention, the binding documentation should come first so that `dt_binding_check` can validate the DTS. These two patches should be reordered.

**The DTS node itself looks reasonable:**

```dts
gpu: gpu@4e20000000 {
    compatible = "ti,j721e-gpu", "img,img-ge8430", "img,img-rogue";
    reg = <0x4e 0x20000000 0x00 0x80000>;
    clocks = <&k3_clks 125 0>;
    clock-names = "core";
    assigned-clocks = <&k3_clks 125 0>;
    assigned-clock-rates = <750000000>;
    interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>,
            <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    power-domain-names = "a", "b";
    dma-coherent;
};
```

- The compatible string triple (`ti,j721e-gpu`, `img,img-ge8430`, `img,img-rogue`) correctly follows the fallback chain pattern.
- `power-domain-names = "a", "b"` -- these names are very generic. Is this the established pattern for TI GPU power domains? If so, fine, but more descriptive names would be preferable.
- **Missing `status = "disabled"`**: Many TI DTS main dtsi files use `status = "disabled"` for peripheral nodes, with board-level dts files enabling them. Is the GPU always expected to be enabled? If not, this should be disabled by default.

**Commit message** is terse ("Add the series 8XE GPU node for j721e device tree.") but adequate for a DTS patch.

---

---
Generated by Claude Code Patch Reviewer

[PATCH 2/5] dt-bindings: gpu: img: Add J721e SoC specific compatible

[Antonios Christidis]

Add J721e SoC specific compatible.

Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
 Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index a1f54dbae3f3..56249d1e65aa 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
@@ -44,7 +44,11 @@ properties:
               - ti,j721s2-gpu
           - const: img,img-bxs-4-64
           - const: img,img-rogue
-
+      - items:
+          - enum:
+              - ti,j721e-gpu
+          - const: img,img-ge8430
+          - const: img,img-rogue
       # This legacy combination of compatible strings was introduced early on
       # before the more specific GPU identifiers were used.
       - items:
@@ -103,6 +107,7 @@ allOf:
               - ti,am62-gpu
               - ti,am62p-gpu
               - ti,j721s2-gpu
+              - ti,j721e-gpu
     then:
       properties:
         clocks:

-- 
2.34.1

Re: [PATCH 2/5] dt-bindings: gpu: img: Add J721e SoC specific compatible

[Andrew Davis]

On 2/24/26 12:09 PM, Antonios Christidis wrote:
> Add J721e SoC specific compatible.
> 
> Signed-off-by: Antonios Christidis <a-christidis@ti.com>
> ---
>   Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index a1f54dbae3f3..56249d1e65aa 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -44,7 +44,11 @@ properties:
>                 - ti,j721s2-gpu
>             - const: img,img-bxs-4-64
>             - const: img,img-rogue
> -
> +      - items:
> +          - enum:
> +              - ti,j721e-gpu
> +          - const: img,img-ge8430
> +          - const: img,img-rogue

Leave the newline at the end here before the comment.

Also, binding updates need to go before you make use of them. This patch
needs to go first in the series.

Andrew

>         # This legacy combination of compatible strings was introduced early on
>         # before the more specific GPU identifiers were used.
>         - items:
> @@ -103,6 +107,7 @@ allOf:
>                 - ti,am62-gpu
>                 - ti,am62p-gpu
>                 - ti,j721s2-gpu
> +              - ti,j721e-gpu
>       then:
>         properties:
>           clocks:
> 

Re: [PATCH 2/5] dt-bindings: gpu: img: Add J721e SoC specific compatible

[Krzysztof Kozlowski]

On Tue, Feb 24, 2026 at 12:09:16PM -0600, Antonios Christidis wrote:
> Add J721e SoC specific compatible.
> 
> Signed-off-by: Antonios Christidis <a-christidis@ti.com>
> ---
>  Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index a1f54dbae3f3..56249d1e65aa 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -44,7 +44,11 @@ properties:
>                - ti,j721s2-gpu
>            - const: img,img-bxs-4-64
>            - const: img,img-rogue
> -
> +      - items:
> +          - enum:
> +              - ti,j721e-gpu
> +          - const: img,img-ge8430
> +          - const: img,img-rogue
>        # This legacy combination of compatible strings was introduced early on
>        # before the more specific GPU identifiers were used.
>        - items:
> @@ -103,6 +107,7 @@ allOf:
>                - ti,am62-gpu
>                - ti,am62p-gpu
>                - ti,j721s2-gpu
> +              - ti,j721e-gpu

What about img,img-ge8430? Why this one does not have constraints?

What about all other constraints?

>      then:
>        properties:
>          clocks:

Best regards,
Krzysztof

Claude review: dt-bindings: gpu: img: Add J721e SoC specific compatible

[Claude Code Review Bot]

Patch Review

**Author:** Antonios Christidis

Adds `ti,j721e-gpu` with `img,img-ge8430` to the PowerVR Rogue binding.

**Missing blank line:** The diff removes the blank line that separates the BXS-4-64 block from the legacy compatible block comment:

```yaml
-
+      - items:
+          - enum:
+              - ti,j721e-gpu
+          - const: img,img-ge8430
+          - const: img,img-rogue
       # This legacy combination of compatible strings was introduced early on
```

The original blank line before `# This legacy combination` acted as a visual separator. A blank line should be added after the new block to maintain readability:

```yaml
+      - items:
+          - enum:
+              - ti,j721e-gpu
+          - const: img,img-ge8430
+          - const: img,img-rogue
+
       # This legacy combination of compatible strings was introduced early on
```

**The allOf addition looks correct:**

```yaml
              - ti,am62-gpu
              - ti,am62p-gpu
              - ti,j721s2-gpu
+              - ti,j721e-gpu
```

This adds `ti,j721e-gpu` to the list of compatibles that have the single-clock constraint, which is correct.

**Question:** Does the `img,img-ge8430` GPU identifier need any driver-side changes to be recognized? If the driver currently doesn't handle this GPU ID, a driver patch may be needed in this series as well.

---

---
Generated by Claude Code Patch Reviewer

[PATCH 3/5] arm64: dts: ti: k3-j784s4: Add GPU node

[Antonios Christidis]

Add the Series BXS GPU node for j784s4 device tree.

Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 78fcd0c40abc..ddb9385cd942 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -137,6 +137,20 @@ serdes2: serdes@5020000 {
 		};
 	};
 
+	gpu: gpu@4e20000000 {
+		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
+		reg = <0x4e 0x20000000 0x00 0x80000>;
+		clocks = <&k3_clks 181 1>;
+		clock-names = "core";
+		assigned-clocks = <&k3_clks 181 1>;
+		assigned-clock-rates = <800000000>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
+			<&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+		dma-coherent;
+	};
+
 	c71_3: dsp@67800000 {
 		compatible = "ti,j721s2-c71-dsp";
 		reg = <0x00 0x67800000 0x00 0x00080000>,

-- 
2.34.1

Claude review: arm64: dts: ti: k3-j784s4: Add GPU node

[Claude Code Review Bot]

Patch Review

**Author:** Antonios Christidis

Adds the BXS-464 GPU node for the J784S4 SoC.

```dts
gpu: gpu@4e20000000 {
    compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
    reg = <0x4e 0x20000000 0x00 0x80000>;
    clocks = <&k3_clks 181 1>;
    clock-names = "core";
    assigned-clocks = <&k3_clks 181 1>;
    assigned-clock-rates = <800000000>;
    interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
    power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
        <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
    power-domain-names = "a", "b";
    dma-coherent;
};
```

- Uses `"ti,j721s2-gpu"` as the SoC-specific compatible -- this reuses the existing J721S2 compatible rather than introducing a new J784S4-specific one. This makes sense if the J784S4 GPU block is identical to J721S2's, but the cover letter and commit message should explain this choice.
- **No new dt-binding needed** since `ti,j721s2-gpu` already exists in the binding, which is consistent.
- **Indentation inconsistency** in `power-domains`: uses a single tab indent for the continuation line, while patch 1 uses a double tab. This is minor but worth keeping consistent across the series:

  Patch 1:
  ```
  power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>,
  		<&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
  ```
  Patch 3:
  ```
  power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>,
  	<&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
  ```

- Same `status = "disabled"` question as patch 1.
- The commit message says "Add the Series BXS GPU node" -- "Series" should probably be lowercase or the whole identifier should be quoted/clarified (e.g., "BXS-464").

---

---
Generated by Claude Code Patch Reviewer

[PATCH 4/5] arm64: dts: ti: add GPU node

[a-christidis]

From: Michael Walle <mwalle@kernel.org>

The J722S features a BXS-4 GPU. Add the node for it.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 0e1af2a69ca2..20f7474f986b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -1110,6 +1110,17 @@ dphy0: phy@30110000 {
 		status = "disabled";
 	};
 
+	gpu: gpu@fd80000 {
+		compatible = "ti,am62p-gpu", "img,img-bxs-4-64", "img,img-rogue";
+		reg = <0x00 0x0fd80000 0x00 0x80000>;
+		clocks = <&k3_clks 237 3>;
+		clock-names = "core";
+		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
+				<&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
+		power-domain-names = "a", "b";
+	};
+
 	vpu: video-codec@30210000 {
 		compatible = "ti,j721s2-wave521c", "cnm,wave521c";
 		reg = <0x00 0x30210000 0x00 0x10000>;

-- 
2.34.1

Claude review: arm64: dts: ti: add GPU node

[Claude Code Review Bot]

Patch Review

**Author:** Michael Walle (carried by Antonios Christidis)

Adds the BXS-4 GPU node for J722S/AM62P in the shared common-main dtsi.

**Vague subject line:** `"arm64: dts: ti: add GPU node"` doesn't specify which SoC. It should be something like `"arm64: dts: ti: k3-am62p-j722s: Add GPU node"` to match the convention of the other patches in this series.

```dts
gpu: gpu@fd80000 {
    compatible = "ti,am62p-gpu", "img,img-bxs-4-64", "img,img-rogue";
    reg = <0x00 0x0fd80000 0x00 0x80000>;
    clocks = <&k3_clks 237 3>;
    clock-names = "core";
    interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
    power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
            <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
    power-domain-names = "a", "b";
};
```

**Inconsistencies compared to patches 1 and 3:**

1. **Missing `assigned-clocks` / `assigned-clock-rates`**: Patches 1 and 3 both set these to configure the GPU clock rate. If the AM62P/J722S GPU needs a specific clock rate to function, these should be added. If the default is acceptable, the cover letter or commit message should explain why this node differs.

2. **Missing `dma-coherent`**: Patches 1 and 3 include `dma-coherent`. If AM62P/J722S doesn't support hardware-managed cache coherency for the GPU, this omission is correct, but it should be documented in the commit message.

These differences are likely hardware-specific and intentional, but they should be explicitly noted.

---

---
Generated by Claude Code Patch Reviewer

[PATCH 5/5] clk: keystone: don't cache clock rate

[a-christidis]

From: Michael Walle <mwalle@kernel.org>

The TISCI firmware will return 0 if the clock or consumer is not
enabled although there is a stored value in the firmware. IOW a call to
set rate will work but at get rate will always return 0 if the clock is
disabled.
The clk framework will try to cache the clock rate when it's requested
by a consumer. If the clock or consumer is not enabled at that point,
the cached value is 0, which is wrong. Thus, disable the cache
altogether.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Antonios Christidis <a-christidis@ti.com>
---
 drivers/clk/keystone/sci-clk.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index 9d5071223f4c..0a1565fdbb3b 100644
--- a/drivers/clk/keystone/sci-clk.c
+++ b/drivers/clk/keystone/sci-clk.c
@@ -333,6 +333,14 @@ static int _sci_clk_build(struct sci_clk_provider *provider,
 
 	init.ops = &sci_clk_ops;
 	init.num_parents = sci_clk->num_parents;
+
+	/*
+	 * A clock rate query to the SCI firmware will return 0 if either the
+	 * clock itself is disabled or the attached device/consumer is disabled.
+	 * This makes it inherently unsuitable for the caching of the clk
+	 * framework.
+	 */
+	init.flags = CLK_GET_RATE_NOCACHE;
 	sci_clk->hw.init = &init;
 
 	ret = devm_clk_hw_register(provider->dev, &sci_clk->hw);

-- 
2.34.1

Claude review: clk: keystone: don't cache clock rate

[Claude Code Review Bot]

Patch Review

**Author:** Michael Walle (carried by Antonios Christidis)

This patch sets `CLK_GET_RATE_NOCACHE` on all TI SCI clocks because the firmware returns 0 for disabled clocks/consumers, causing the clock framework cache to store an incorrect value.

```c
+	/*
+	 * A clock rate query to the SCI firmware will return 0 if either the
+	 * clock itself is disabled or the attached device/consumer is disabled.
+	 * This makes it inherently unsuitable for the caching of the clk
+	 * framework.
+	 */
+	init.flags = CLK_GET_RATE_NOCACHE;
```

**Good:**
- Well-commented with clear rationale.
- Has three Reviewed-by tags (Kevin Hilman, Randolph Sapp, Nishanth Menon).
- The fix is correct -- if firmware returns 0 for disabled clocks, caching will cause wrong rates to be used after clock enable.

**Concerns:**

1. **Series placement**: This is a bugfix for the clock driver that is a prerequisite for the GPU nodes to work correctly (the GPU driver presumably calls `clk_get_rate()` before enabling the clock). It should be patch 1 in the series, not patch 5, since later patches logically depend on it. Alternatively, it could be submitted as a separate standalone fix with a Fixes: tag, since it affects all SCI clocks, not just GPU clocks.

2. **Potential overwriting of existing flags**: The code does `init.flags = CLK_GET_RATE_NOCACHE;` which *replaces* any existing flags value rather than ORing it in. Looking at the surrounding code, `init.flags` doesn't appear to be set earlier in this function, so this is fine for now, but using `init.flags |= CLK_GET_RATE_NOCACHE;` would be more defensive against future changes adding other flags.

3. **Scope**: This affects *all* TI SCI clocks, not just GPU clocks. The commit message explains why this is necessary (firmware limitation), but the broad scope means this should be tested across the full set of TI K3 platforms to ensure no regressions. Given the existing Reviewed-by tags from TI engineers, this seems to have been vetted.

4. **Missing Fixes: tag**: If this is fixing a bug that existed since the driver was introduced, a `Fixes:` tag referencing the original commit would be appropriate and would help with backporting.

---
Generated by Claude Code Patch Reviewer

Re: [PATCH 0/5] drm/imagination: add support for j721e,j784s4,j722s,am62p

[Nishanth Menon]

On 12:09-20260224, Antonios Christidis wrote:
> ---
> Antonios Christidis (3):
>       arm64: dts: ti: k3-j721e: Add GPU node
>       dt-bindings: gpu: img: Add J721e SoC specific compatible
>       arm64: dts: ti: k3-j784s4: Add GPU node
> 
> Michael Walle (2):
>       arm64: dts: ti: add GPU node
Now that you are picking this up, please Fix the $subject.
>       clk: keystone: don't cache clock rate


Bunch of interleaved "kind of related" patches in a single series.
please do not do this.

j784s4 can go in on it's own.

j722s/am62p needs to wait for clk-cache patch to go in, but the
clk-cache patch probably needs to be submitted individually to linux-clk
mailing list for Stephen to pick up.

Please provide reference in the patch diffstat as to where the previous
version of the patch is.


Finally: j721e - please get the binding accepted through drm mailing
list, then we can see about the dts.

> 
>  .../devicetree/bindings/gpu/img,powervr-rogue.yaml         |  7 ++++++-
>  arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi     | 11 +++++++++++
>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi                  | 14 ++++++++++++++
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi                 | 14 ++++++++++++++
>  drivers/clk/keystone/sci-clk.c                             |  8 ++++++++
>  5 files changed, 53 insertions(+), 1 deletion(-)
> ---
> base-commit: 3ef088b0c5772a6f75634e54aa34f5fc0a2c041c
> change-id: 20260224-gpu_dts-ab32c568d756
> 
> Best regards,
> -- 
> Antonios Christidis <a-christidis@ti.com>
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
https://ti.com/opensource

Claude review: drm/imagination: add support for j721e,j784s4,j722s,am62p

[Claude Code Review Bot]

Overall Series Review

Subject: drm/imagination: add support for j721e,j784s4,j722s,am62p
Author: Antonios Christidis <a-christidis@ti.com>
Patches: 9
Reviewed: 2026-02-27T14:48:57.776869

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This is a 5-patch series adding GPU device tree nodes for TI K3 SoCs (J721E, J784S4, J722S/AM62P) to enable the Imagination/PowerVR GPU driver, plus a clock framework fix. The series is authored by Antonios Christidis (TI) and includes two patches originally from Michael Walle.

**Overall assessment: Needs minor revisions.** The patches are straightforward DTS additions with reasonable content, but there are ordering issues, a missing blank line in the binding patch, inconsistencies between the DTS nodes across patches, and a vague subject line.

**Key concerns:**
1. **Patch ordering**: The DT binding (patch 2) should come *before* the DTS that uses the new compatible (patch 1), per kernel convention.
2. **Inconsistencies** across DTS nodes: patch 4 is missing `assigned-clocks`/`assigned-clock-rates` and `dma-coherent` compared to patches 1 and 3. This may be intentional but needs clarification.
3. **Patch 5 (clock fix)** is a functional fix that other patches depend on and arguably belongs at the start of the series or in a separate submission.
4. Missing `status = "disabled"` on all GPU nodes -- if the convention for this platform is to leave nodes disabled and enable per-board, this should be added.

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Generated by Claude Code Patch Reviewer