* [PATCH v2 0/2] (no cover subject)
@ 2026-03-02 9:33 Abel Vesa
2026-03-02 9:36 ` Abel Vesa
2026-03-03 3:40 ` Claude review: " Claude Code Review Bot
0 siblings, 2 replies; 3+ messages in thread
From: Abel Vesa @ 2026-03-02 9:33 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa
Cc: Dmitry Baryshkov, Krzysztof Kozlowski, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, Abel Vesa, stable
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Changes in v2:
- Fixed the reg ranges in the example node in qcom,glymur-mdss.yaml as well.
- Link to v1: https://patch.msgid.link/20260227-glymur-fix-dp-bindings-reg-clocks-v1-1-99f7b42b43aa@oss.qualcomm.com
---
Abel Vesa (2):
dt-bindings: display: msm: Fix reg ranges and clocks on Glymur
dt-bindings: display: msm: Fix reg ranges for DP example node
.../bindings/display/msm/dp-controller.yaml | 21 ++++++++++++++++++++-
.../bindings/display/msm/qcom,glymur-mdss.yaml | 16 ++++++++++------
2 files changed, 30 insertions(+), 7 deletions(-)
---
base-commit: 7c21b660e919698b10efa8bdb120f0f9bc3d3832
change-id: 20260227-glymur-fix-dp-bindings-reg-clocks-704d0ccbeef9
Best regards,
--
Abel Vesa <abel.vesa@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2 0/2] (no cover subject)
2026-03-02 9:33 [PATCH v2 0/2] (no cover subject) Abel Vesa
@ 2026-03-02 9:36 ` Abel Vesa
2026-03-03 3:40 ` Claude review: " Claude Code Review Bot
1 sibling, 0 replies; 3+ messages in thread
From: Abel Vesa @ 2026-03-02 9:36 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa
Cc: Dmitry Baryshkov, Krzysztof Kozlowski, linux-arm-msm, dri-devel,
freedreno, devicetree, linux-kernel, stable
On 26-03-02 11:33:18, Abel Vesa wrote:
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
> Changes in v2:
> - Fixed the reg ranges in the example node in qcom,glymur-mdss.yaml as well.
> - Link to v1: https://patch.msgid.link/20260227-glymur-fix-dp-bindings-reg-clocks-v1-1-99f7b42b43aa@oss.qualcomm.com
Ignore this please.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Claude review: (no cover subject)
2026-03-02 9:33 [PATCH v2 0/2] (no cover subject) Abel Vesa
2026-03-02 9:36 ` Abel Vesa
@ 2026-03-03 3:40 ` Claude Code Review Bot
1 sibling, 0 replies; 3+ messages in thread
From: Claude Code Review Bot @ 2026-03-03 3:40 UTC (permalink / raw)
To: dri-devel-reviews
Overall Series Review
Subject: (no cover subject)
Author: Abel Vesa <abel.vesa@oss.qualcomm.com>
Patches: 2
Reviewed: 2026-03-03T13:40:01.758671
---
This is a 2-patch series fixing Qualcomm Glymur DP controller device tree bindings. The changes are logically sound: Glymur's DP controllers have 4 ports in their register space (unlike similar platforms that only have 2), requiring 9 `reg` entries instead of 5. The series correctly separates Glymur into its own conditional block and updates the example node to match. Both patches are tagged for stable (v6.19), which is appropriate for binding fixes.
**One notable issue**: The patch perpetuates a pre-existing typo (`clocks-names` instead of `clock-names`) present in all existing conditional blocks in `dp-controller.yaml`. Since the property is defined as `clock-names` (line 101), all the `clocks-names` constraints in the `allOf` conditionals are effectively dead — they constrain a non-existent property and thus never enforce anything. This is worth flagging even though it's not introduced by this series.
The v2 was sent without a cover subject and the author noted it should be ignored; v3 is the corrected submission with identical patches.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 3+ messages in thread
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