From: Hugo Villeneuve <hugo@hugovil.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
andrzej.hajda@intel.com, neil.armstrong@linaro.org,
rfoss@kernel.org, Laurent.pinchart@ideasonboard.com,
jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com,
simona@ffwll.ch, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, Frank.Li@nxp.com,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, shawnguo@kernel.org,
laurent.pinchart+renesas@ideasonboard.com,
antonin.godard@bootlin.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, hugo@hugovil.com,
Hugo Villeneuve <hvilleneuve@dimonoff.com>
Subject: [PATCH 10/14] ARM: dts: imx6ul-var-som: factor out ENET2 ethernet support
Date: Mon, 2 Mar 2026 14:03:46 -0500 [thread overview]
Message-ID: <20260302190953.669325-11-hugo@hugovil.com> (raw)
In-Reply-To: <20260302190953.669325-1-hugo@hugovil.com>
From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Not all boards use the ethernet ENET2 port, so factor out this
functionality to a separate DTSI include file.
On the concerto board, this uses the ethernet PHY assembled on it.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
---
.../dts/nxp/imx/imx6ul-var-som-common.dtsi | 7 --
.../imx/imx6ul-var-som-concerto-common.dtsi | 50 --------------
.../nxp/imx/imx6ul-var-som-concerto-full.dts | 1 +
.../dts/nxp/imx/imx6ul-var-som-concerto.dts | 1 +
.../dts/nxp/imx/imx6ul-var-som-enet2.dtsi | 68 +++++++++++++++++++
.../nxp/imx/imx6ull-var-som-concerto-full.dts | 1 +
.../dts/nxp/imx/imx6ull-var-som-concerto.dts | 1 +
7 files changed, 72 insertions(+), 57 deletions(-)
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi
index af8c5d2db53d4..af9b92f7709b4 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi
@@ -37,13 +37,6 @@ reg_gpio_dvfs: reg-gpio-dvfs {
states = <1300000 0x1
1400000 0x0>;
};
-
- rmii_ref_clk: rmii-ref-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- clock-output-names = "rmii-ref";
- };
};
&clks {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
index ea8d9905ce6e7..53cf801f39fcd 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
@@ -56,30 +56,6 @@ &fec1 {
status = "disabled";
};
-&fec2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_gpio>, <&pinctrl_enet2_mdio>;
- phy-mode = "rmii";
- phy-handle = <ðphy1>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@3 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- clocks = <&rmii_ref_clk>;
- clock-names = "rmii-ref";
- reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
- reset-assert-us = <100000>;
- micrel,led-mode = <0>;
- micrel,rmii-reference-clock-select-25-mhz;
- };
- };
-};
-
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
@@ -101,32 +77,6 @@ rtc@68 {
};
&iomuxc {
- pinctrl_enet2: enet2grp {
- fsl,pins = <
- MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
- MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
- MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
- MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
- >;
- };
-
- pinctrl_enet2_gpio: enet2-gpiogrp {
- fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* fec2 reset */
- >;
- };
-
- pinctrl_enet2_mdio: enet2-mdiogrp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
- MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
- >;
- };
-
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
index 519250b31db24..3905171b47b32 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
@@ -11,6 +11,7 @@
#include "imx6ul-var-som.dtsi"
#include "imx6ul-var-som-concerto-common.dtsi"
#include "imx6ul-var-som-wifi.dtsi"
+#include "imx6ul-var-som-enet2.dtsi"
/ {
model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
index 85ebac30d7bed..d0adcd0e80833 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
@@ -12,6 +12,7 @@
#include "imx6ul-var-som.dtsi"
#include "imx6ul-var-som-concerto-common.dtsi"
#include "imx6ul-var-som-sd.dtsi"
+#include "imx6ul-var-som-enet2.dtsi"
/ {
model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi
new file mode 100644
index 0000000000000..334ed3bbe02ce
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Ethernet ENET2 support for Variscite VAR-SOM-6UL module.
+ *
+ * Copyright 2019-2024 Variscite Ltd.
+ * Copyright 2026 Dimonoff
+ */
+
+/ {
+ rmii_ref_clk: rmii-ref-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ clock-output-names = "rmii-ref";
+ };
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_gpio>, <&pinctrl_enet2_mdio>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio_enet2: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ clocks = <&rmii_ref_clk>;
+ clock-names = "rmii-ref";
+ reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <100000>;
+ micrel,led-mode = <0>;
+ micrel,rmii-reference-clock-select-25-mhz;
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2_gpio: enet2-gpiogrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* fec2 reset */
+ >;
+ };
+
+ pinctrl_enet2_mdio: enet2-mdiogrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ >;
+ };
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
index 7c0e313603630..89b6032203a28 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
@@ -11,6 +11,7 @@
#include "imx6ull-var-som.dtsi"
#include "imx6ul-var-som-concerto-common.dtsi"
#include "imx6ul-var-som-wifi.dtsi"
+#include "imx6ul-var-som-enet2.dtsi"
/ {
model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
index ebf88c3e1addc..f9bc6a9a5c1be 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
@@ -11,6 +11,7 @@
#include "imx6ull-var-som.dtsi"
#include "imx6ul-var-som-concerto-common.dtsi"
#include "imx6ul-var-som-sd.dtsi"
+#include "imx6ul-var-som-enet2.dtsi"
/ {
model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";
--
2.47.3
next prev parent reply other threads:[~2026-03-02 19:11 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-02 19:03 [PATCH 00/14] var-som-6ul: improve support for variants Hugo Villeneuve
2026-03-02 19:03 ` [PATCH 01/14] ARM: dts: imx6ul-var-som: fix warning for non-existent dc-supply property Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 02/14] ARM: dts: imx6ul-var-som: fix warning for boolean property with a value Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 03/14] ARM: dts: imx6ul-var-som: change incorrect VAR-SOM-6UL model name Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 04/14] dt-bindings: arm: fsl: " Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 05/14] dt-bindings: arm: fsl: add variscite,var-som-imx6ull Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 06/14] ARM: dts: imx6ul-var-som: Factor out common parts for all CPU variants Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 07/14] ARM: dts: imx6ul-var-som-concerto: " Hugo Villeneuve
2026-03-02 20:50 ` Frank Li
2026-03-02 21:07 ` Hugo Villeneuve
2026-03-02 21:28 ` Frank Li
2026-03-02 21:36 ` Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 08/14] ARM: dts: imx6ul-var-som: factor out SD card support Hugo Villeneuve
2026-03-02 20:54 ` Frank Li
2026-03-02 21:15 ` Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 09/14] ARM: dts: imx6ul-var-som: add proper Wifi and Bluetooth support Hugo Villeneuve
2026-03-02 20:59 ` Frank Li
2026-03-02 21:42 ` Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` Hugo Villeneuve [this message]
2026-03-03 2:58 ` Claude review: ARM: dts: imx6ul-var-som: factor out ENET2 ethernet support Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 11/14] ARM: dts: imx6ul-var-som: add support for EC configuration option (ENET1) Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 12/14] ARM: dts: imx6ul-var-som: factor out audio support Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 13/14] dt-bindings: display/lvds-codec: add ti,sn65lvds93 Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-02 19:03 ` [PATCH 14/14] ARM: dts: imx6ul-var-som: add support for LVDS display panel Hugo Villeneuve
2026-03-03 2:58 ` Claude review: " Claude Code Review Bot
2026-03-03 2:58 ` Claude review: var-som-6ul: improve support for variants Claude Code Review Bot
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