From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A638EDEBEB for ; Tue, 3 Mar 2026 19:24:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4C2110E8A6; Tue, 3 Mar 2026 19:24:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.b="ozTA86d4"; dkim-atps=neutral Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) by gabe.freedesktop.org (Postfix) with ESMTPS id 14B9810E8A6 for ; Tue, 3 Mar 2026 19:24:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1772565892; bh=qYvReqSB6UJn7rr3CRBtQrUk86GQPHVbFJQGJ77D43c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ozTA86d4habLb2jqTJQA/c+1lSV8NTtOWrp5nqdJUwdBCgd1NIH8s/zhtKCdFN175 w5e0oswWtdGpACDI4U7fD1GDZZUSJGWeZVuVTMwXLfFFHS8JIY53a5gXpPOf3zZBr7 d8AMOJDw0iSCo7Mbns3s52X3ugPy9xvh8cBDE3XiBvalc/K6FXT3akrD3jZ2UnG+ZY ZYS7NnjkXjRCHBHwZLun/niYVKiuxCcotCnxu6IJjXtAfh/Pe7JFka3yIppqjagxRr 2HVHeN8WEESA6wplLbn4fNp+T8Yi0tzTvDUeCdGCA3xV/LB2ndXcQ1LrfDUJMxUcHJ jQVQtaXRRiWdA== Received: from localhost (unknown [86.123.23.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 509EC17E1004; Tue, 3 Mar 2026 20:24:52 +0100 (CET) From: Cristian Ciocaltea Date: Tue, 03 Mar 2026 21:24:20 +0200 Subject: [PATCH v8 4/4] drm/rockchip: vop2: Support setting custom background color MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260303-rk3588-bgcolor-v8-4-fee377037ad1@collabora.com> References: <20260303-rk3588-bgcolor-v8-0-fee377037ad1@collabora.com> In-Reply-To: <20260303-rk3588-bgcolor-v8-0-fee377037ad1@collabora.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Louis Chauvet , Haneen Mohammed , Melissa Wen , Jani Nikula , Andy Shevchenko Cc: Robert Mader , kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Diederik de Haas , Andy Yan X-Mailer: b4 0.14.3 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Rockchip VOP2 display controller allows configuring the background color of each video output port. Since a previous patch introduced the BACKGROUND_COLOR CRTC property, which defaults to solid black, make use of it when programming the hardware. Note the maximum precision allowed by the display controller is 10bpc, while the alpha component is not supported, hence ignored. Tested-by: Diederik de Haas Reviewed-by: Andy Yan Signed-off-by: Cristian Ciocaltea --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 24 +++++++++++++++++++++++- drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 4 ++++ 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index a195f5c819a2..843c7ef979b2 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1080,6 +1080,13 @@ static int vop2_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } + if ((cstate->background_color << 16) && + (fb->format->has_alpha || pstate->alpha != 0xffff)) { + drm_dbg_kms(vop2->drm, + "Alpha-blending with background color is unsupported\n"); + return -EINVAL; + } + return 0; } @@ -1552,6 +1559,7 @@ static void vop2_post_config(struct drm_crtc *crtc) struct vop2_video_port *vp = to_vop2_video_port(crtc); struct vop2 *vop2 = vp->vop2; struct drm_display_mode *mode = &crtc->state->adjusted_mode; + u64 bgcolor = crtc->state->background_color; u16 vtotal = mode->crtc_vtotal; u16 hdisplay = mode->crtc_hdisplay; u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; @@ -1597,7 +1605,15 @@ static void vop2_post_config(struct drm_crtc *crtc) vop2_vp_write(vp, RK3568_VP_POST_DSP_VACT_INFO_F1, val); } - vop2_vp_write(vp, RK3568_VP_DSP_BG, 0); + /* + * Background color is programmed with 10 bits of precision. + * Since performance is more important than accuracy here, + * make use of the DRM_ARGB64_GET*_BPCS() helpers. + */ + val = FIELD_PREP(RK3568_VP_DSP_BG__DSP_BG_RED, DRM_ARGB64_GETR_BPCS(bgcolor, 10)); + FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_GREEN, &val, DRM_ARGB64_GETG_BPCS(bgcolor, 10)); + FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_BLUE, &val, DRM_ARGB64_GETB_BPCS(bgcolor, 10)); + vop2_vp_write(vp, RK3568_VP_DSP_BG, val); } static int us_to_vertical_line(struct drm_display_mode *mode, int us) @@ -1983,6 +1999,10 @@ static int vop2_crtc_state_dump(struct drm_crtc *crtc, struct seq_file *s) drm_get_bus_format_name(vcstate->bus_format)); seq_printf(s, "\toutput_mode[%x]", vcstate->output_mode); seq_printf(s, " color_space[%d]\n", vcstate->color_space); + seq_printf(s, "\tbackground color (10bpc): r=0x%x g=0x%x b=0x%x\n", + DRM_ARGB64_GETR_BPCS(cstate->background_color, 10), + DRM_ARGB64_GETG_BPCS(cstate->background_color, 10), + DRM_ARGB64_GETB_BPCS(cstate->background_color, 10)); seq_printf(s, " Display mode: %dx%d%s%d\n", mode->hdisplay, mode->vdisplay, interlaced ? "i" : "p", drm_mode_vrefresh(mode)); @@ -2471,6 +2491,8 @@ static int vop2_create_crtcs(struct vop2 *vop2) return dev_err_probe(drm->dev, ret, "crtc init for video_port%d failed\n", i); + drm_crtc_attach_background_color_property(&vp->crtc); + drm_crtc_helper_add(&vp->crtc, &vop2_crtc_helper_funcs); if (vop2->lut_regs) { const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id]; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h index 9124191899ba..37722652844a 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h @@ -658,6 +658,10 @@ enum dst_factor_mode { #define RK3588_VP_CLK_CTRL__DCLK_OUT_DIV GENMASK(3, 2) #define RK3588_VP_CLK_CTRL__DCLK_CORE_DIV GENMASK(1, 0) +#define RK3568_VP_DSP_BG__DSP_BG_RED GENMASK(29, 20) +#define RK3568_VP_DSP_BG__DSP_BG_GREEN GENMASK(19, 10) +#define RK3568_VP_DSP_BG__DSP_BG_BLUE GENMASK(9, 0) + #define RK3568_VP_POST_SCL_CTRL__VSCALEDOWN BIT(1) #define RK3568_VP_POST_SCL_CTRL__HSCALEDOWN BIT(0) -- 2.52.0