From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Akhil P Oommen <akhilpo@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 19/24] soc: qcom: ubwc: drop ubwc_dec_version
Date: Fri, 06 Mar 2026 18:47:25 +0200 [thread overview]
Message-ID: <20260306-ubwc-rework-v1-19-9cfdff12f2bb@oss.qualcomm.com> (raw)
In-Reply-To: <20260306-ubwc-rework-v1-0-9cfdff12f2bb@oss.qualcomm.com>
The ubwc_dec_version field has been inherited from the MDSS driver and
it is equal to the version of the UBWC decoder in the display block
only. Other IP Cores can have different UBWC decoders and so the version
would vary between blocks.
As the value is no longer used as is not relevant to other UBWC database
consumers, drop it from the UBWC database.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/soc/qcom/ubwc_config.c | 22 ----------------------
include/linux/soc/qcom/ubwc.h | 2 --
2 files changed, 24 deletions(-)
diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c
index e63daf748e30..c5c7fcb4d013 100644
--- a/drivers/soc/qcom/ubwc_config.c
+++ b/drivers/soc/qcom/ubwc_config.c
@@ -18,7 +18,6 @@ static const struct qcom_ubwc_cfg_data no_ubwc_data = {
static const struct qcom_ubwc_cfg_data kaanapali_data = {
.ubwc_enc_version = UBWC_6_0,
- .ubwc_dec_version = UBWC_6_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -28,7 +27,6 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = {
static const struct qcom_ubwc_cfg_data msm8937_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_dec_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
@@ -37,7 +35,6 @@ static const struct qcom_ubwc_cfg_data msm8937_data = {
static const struct qcom_ubwc_cfg_data msm8998_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_dec_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
@@ -51,7 +48,6 @@ static const struct qcom_ubwc_cfg_data qcm2290_data = {
static const struct qcom_ubwc_cfg_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
.highest_bank_bit = 13,
@@ -60,7 +56,6 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = {
static const struct qcom_ubwc_cfg_data sar2130p_data = {
.ubwc_enc_version = UBWC_3_0, /* 4.0.2 in hw */
- .ubwc_dec_version = UBWC_4_3,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -70,7 +65,6 @@ static const struct qcom_ubwc_cfg_data sar2130p_data = {
static const struct qcom_ubwc_cfg_data sc7180_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -79,7 +73,6 @@ static const struct qcom_ubwc_cfg_data sc7180_data = {
static const struct qcom_ubwc_cfg_data sc7280_data = {
.ubwc_enc_version = UBWC_3_0,
- .ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -89,7 +82,6 @@ static const struct qcom_ubwc_cfg_data sc7280_data = {
static const struct qcom_ubwc_cfg_data sc8180x_data = {
.ubwc_enc_version = UBWC_3_0,
- .ubwc_dec_version = UBWC_3_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
@@ -98,7 +90,6 @@ static const struct qcom_ubwc_cfg_data sc8180x_data = {
static const struct qcom_ubwc_cfg_data sc8280xp_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -108,7 +99,6 @@ static const struct qcom_ubwc_cfg_data sc8280xp_data = {
static const struct qcom_ubwc_cfg_data sdm670_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
@@ -116,7 +106,6 @@ static const struct qcom_ubwc_cfg_data sdm670_data = {
static const struct qcom_ubwc_cfg_data sdm845_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
@@ -124,7 +113,6 @@ static const struct qcom_ubwc_cfg_data sdm845_data = {
static const struct qcom_ubwc_cfg_data sm6115_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
@@ -134,7 +122,6 @@ static const struct qcom_ubwc_cfg_data sm6115_data = {
static const struct qcom_ubwc_cfg_data sm6125_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_dec_version = UBWC_3_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
@@ -143,7 +130,6 @@ static const struct qcom_ubwc_cfg_data sm6125_data = {
static const struct qcom_ubwc_cfg_data sm6150_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
@@ -151,7 +137,6 @@ static const struct qcom_ubwc_cfg_data sm6150_data = {
static const struct qcom_ubwc_cfg_data sm6350_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -160,7 +145,6 @@ static const struct qcom_ubwc_cfg_data sm6350_data = {
static const struct qcom_ubwc_cfg_data sm7150_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
@@ -168,7 +152,6 @@ static const struct qcom_ubwc_cfg_data sm7150_data = {
static const struct qcom_ubwc_cfg_data sm8150_data = {
.ubwc_enc_version = UBWC_3_0,
- .ubwc_dec_version = UBWC_3_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
@@ -176,7 +159,6 @@ static const struct qcom_ubwc_cfg_data sm8150_data = {
static const struct qcom_ubwc_cfg_data sm8250_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -187,7 +169,6 @@ static const struct qcom_ubwc_cfg_data sm8250_data = {
static const struct qcom_ubwc_cfg_data sm8350_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -198,7 +179,6 @@ static const struct qcom_ubwc_cfg_data sm8350_data = {
static const struct qcom_ubwc_cfg_data sm8550_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_3,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.ubwc_bank_spread = true,
@@ -209,7 +189,6 @@ static const struct qcom_ubwc_cfg_data sm8550_data = {
static const struct qcom_ubwc_cfg_data sm8750_data = {
.ubwc_enc_version = UBWC_5_0,
- .ubwc_dec_version = UBWC_5_0,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
@@ -219,7 +198,6 @@ static const struct qcom_ubwc_cfg_data sm8750_data = {
static const struct qcom_ubwc_cfg_data glymur_data = {
.ubwc_enc_version = UBWC_5_0,
- .ubwc_dec_version = UBWC_5_0,
.ubwc_swizzle = 0,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
index ddd7b15d9ff1..c5f049eab07d 100644
--- a/include/linux/soc/qcom/ubwc.h
+++ b/include/linux/soc/qcom/ubwc.h
@@ -13,8 +13,6 @@
struct qcom_ubwc_cfg_data {
u32 ubwc_enc_version;
- /* Can be read from MDSS_BASE + 0x58 */
- u32 ubwc_dec_version;
/**
* @ubwc_swizzle: Whether to enable level 1, 2 & 3 bank swizzling.
--
2.47.3
next prev parent reply other threads:[~2026-03-06 16:47 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 16:47 [PATCH 00/24] soc/qcom/ubwc: rework UBWC configuration database Dmitry Baryshkov
2026-03-06 16:47 ` [PATCH 01/24] drm/msm/mdss: correct UBWC programming sequences Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 02/24] soc: qcom: ubwc: define UBWC 3.1 Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 03/24] soc: qcom: ubwc: define helper for MDSS and Adreno drivers Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 04/24] drm/msm/adreno: Trust the SSoT UBWC config Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 05/24] drm/msm/adreno: use qcom_ubwc_version_tag() helper Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 06/24] drm/msm/adreno: use new helper to set min_acc length Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 07/24] drm/msm/mdss: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 08/24] drm/msm/adreno: use new helper to set macrotile_mode Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 09/24] drm/msm/mdss: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 10/24] drm/msm/mdss: use new helper to set UBWC bank spreading Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 11/24] drm/msm/adreno: use new helper to set ubwc_swizzle Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 12/24] drm/msm/dpu: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 13/24] drm/msm/mdss: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 14/24] drm/msm/dpu: drop ubwc_dec_version Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 15/24] drm/msm/adreno: adapt for UBWC 3.1 support Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 16/24] drm/msm/mdss: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 17/24] drm/msm/dpu: " Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 18/24] soc: qcom: ubwc: set min_acc length to 64 for all UBWC 1.0 targets Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` Dmitry Baryshkov [this message]
2026-03-08 22:32 ` Claude review: soc: qcom: ubwc: drop ubwc_dec_version Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 20/24] soc: qcom: ubwc: drop ubwc_bank_spread Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 21/24] soc: qcom: ubwc: drop macrotile_mode from the database Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 22/24] soc: qcom: ubwc: use fixed values for UBWC swizzle for UBWC < 4.0 Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 23/24] soc: qcom: ubwc: sort out the rest of the UBWC swizzle settings Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-06 16:47 ` [PATCH 24/24] soc: qcom: ubwc: deduplicate UBWC configuration data Dmitry Baryshkov
2026-03-08 22:32 ` Claude review: " Claude Code Review Bot
2026-03-08 22:32 ` Claude review: soc/qcom/ubwc: rework UBWC configuration database Claude Code Review Bot
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