From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87621FCB622 for ; Fri, 6 Mar 2026 16:47:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B005C10EDFD; Fri, 6 Mar 2026 16:47:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.b="PDBxg8JD"; dkim=pass (2048-bit key; unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="OPG7gk98"; dkim-atps=neutral Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id E395710EDFB for ; Fri, 6 Mar 2026 16:47:46 +0000 (UTC) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 626Fr1jL082505 for ; Fri, 6 Mar 2026 16:47:46 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 8B2fY2szI51s2UktTG+lS/Bhx/xmTLE0O8Z2hjeZB3M=; b=PDBxg8JDCSiA3WVR enTPdP5d9XO9pAernapCAeIqryYtByS7W/S+OP3dCE1qp4zXuBhbtyPoKJ31jMSi rhliyrfKI93sRZ2kQ8+eYSzqrOUwJUmP9kb53KgcIVprxyvTA5NiF0/CoJ2tW9Bh Fc518ERGOumHD4cXKFr6QsASPvKhGn60bMs9LsdpvuUSIfw1ngNZoMlQ0PC4Y0oj 77cv3ifn7WEigftJpvm6MovP91psx4/bJG6NaZ3/U48toTmWp3k3LqU3hK7ptlWR yD7hyVVtbLKySjvddKqwUB5JgEUS/2z6TFFiJFbL51KKrVm8jjNTCA5vSKnSDO4+ AFRUrg== Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cqv98hc1s-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 06 Mar 2026 16:47:45 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-8cb4817f3c8so4613530285a.3 for ; Fri, 06 Mar 2026 08:47:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1772815665; x=1773420465; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8B2fY2szI51s2UktTG+lS/Bhx/xmTLE0O8Z2hjeZB3M=; b=OPG7gk98/4bIbqgKpi2JClwiBUV3jgNMqCvD9JP/7zGpthXf1JnZ3RrQHdKUi3mreu agSUsXG5VUDq5irAaiU80IeLnv49HtNMb1A4xwTA+61ctVaiz44mxc4k/gJhDpVlP0lx Bxh4w3JWCQh6dK1r9lqZiaPzNepQ5o9wk3ru6uNvM3HM2G2lEYpNtEwwF0qnPa3QxOP+ /iK5txdcw99QJTfiK5lVNfDey0yNHIhTeK9TJC2JmuQBQBfqyzh/C7THcU8bSpGxzH1h NXmvbykYqDvlb7Trmc/bEuHXx/9MnkKT0O1y14+GUIgvIGo0DNGDgk04PnaQgSHNh3zG L96w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772815665; x=1773420465; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=8B2fY2szI51s2UktTG+lS/Bhx/xmTLE0O8Z2hjeZB3M=; b=PQCBSXfeYqwcRvfIrppEk5Mu4KLtk0XyiUtq1HF6PTOgbVU2wEKDV+t0eM4CEQKQ8R Z2/EKq74878eBorgBUAImX0O6cOt9cSsPRxR3pkyTMLflJexg3wGUGsLVrLGHEagbaea 9SsUAv2Zk38ufUblEl+gRGSxeIxF3zsYkDRyRwnMCALC4Yru5T+bR1011hdDDPVOFogA cj+oTQr3+9YwLfeujXPymwiiKtssIDa5bXTgcP+5QJLCIVcxH4yO4KBlwE9FDeguTw/x v9qs3Ock+f6u+rRV2cwF4ovlIFwlo2+af2xbAJt3MA1iO02qqn+MJNj4uDVnpHFsB+Gf 3Mog== X-Forwarded-Encrypted: i=1; AJvYcCWMfISAArao5sIj1hNe01yspwqrla95D29btAfxDDuFfgaKW8Dst7lNNfEdcg/eamlZTQHwbk8fVuo=@lists.freedesktop.org X-Gm-Message-State: AOJu0YxorzS7bWWgheQla+xQhzPvrL6Z+jooSAyG18jbM1YgIqg/UrXF FPNtoIIQw9FqY9Kc+Z/e6WYZyVg8enrksiBpmFTtON+eH8EZRsQuzdE3us6vKh05OJk7SoReZL1 jVwpMHQNmkKCh95n9qHzHGPB4L8zs7g3vWHkWM2t4NVjst5mzLT4a32/OccphOoIILR3JUx4= X-Gm-Gg: ATEYQzyatmIwyvfG+uTyOs775iOi4pFpRNA3qnI1q+GUxHCBkwI+HN+1+rMQc+YEdDZ 9YTJC4Y2KXiPy8Fj5roPqAsVNMMOgIkcnyva/gbKsijQq6KHN0rnozqxptOeHlcyOtVFY/lCM3R yAfbUpeXtLJbnI5QqUHd327M24tJH2Uh+4HO2VMrgq4N9Wk3n2OA+8H7JWqwLOyufP7G/gaXYuA +MCQrDDPdVZcpKpQO8P2aQUNkCo5Ad4s2MZCLQ8wclj5UaOg9DLnax8wCmi9d+2yrXzkO+4wR84 ojjnfeURzUDSEgi10M5AEAouaZxL2XoYP5XWDsLAM3CzD6O8AaFrmD3Oo4Os9PO6OFMmjfObiyv MKSRYGeCA+pgQJubhAoWDlHNVi9ysgkeUgVUx93FMJMlufwYnMNuC0enfrVP5OQReZfIPKXy4mO NQictqSnve8xSIRRsuKl2geC43r2CGDRvcUlM= X-Received: by 2002:a05:620a:4588:b0:8c7:7a3:501c with SMTP id af79cd13be357-8cd6d4285famr320359285a.52.1772815665303; Fri, 06 Mar 2026 08:47:45 -0800 (PST) X-Received: by 2002:a05:620a:4588:b0:8c7:7a3:501c with SMTP id af79cd13be357-8cd6d4285famr320355185a.52.1772815664713; Fri, 06 Mar 2026 08:47:44 -0800 (PST) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a13eaebd0asm213804e87.51.2026.03.06.08.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2026 08:47:43 -0800 (PST) From: Dmitry Baryshkov Date: Fri, 06 Mar 2026 18:47:25 +0200 Subject: [PATCH 19/24] soc: qcom: ubwc: drop ubwc_dec_version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260306-ubwc-rework-v1-19-9cfdff12f2bb@oss.qualcomm.com> References: <20260306-ubwc-rework-v1-0-9cfdff12f2bb@oss.qualcomm.com> In-Reply-To: <20260306-ubwc-rework-v1-0-9cfdff12f2bb@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Akhil P Oommen Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=7985; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=I5lnRHVGhO47eC0F1oaZyDm7ZkFRRSTBKLhGEMk45GY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpqwUP2OplnHHja4BRO4yhK/fj0N6AFxrAN6uGe IpWOa6IgaeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaasFDwAKCRCLPIo+Aiko 1e8+B/9VHHMj3Z1WJ6gHWxG4HrplPXaGNkLWk9J7IRA0MoH+jP5w3tXUEHYfYE/UJuj10kDg9k+ WOXq50TAQT7uM9FFbba9r+ufgQEtnfEgC5rlskKCNglsQSKewLV1LQT1bOdck2lHLSNn8wCz9FK yCRcNHJe/2PqXdT5Md09RiHWOvhWLLzbIy0UdrOy/l5R56Dmc0G2Cog+L9/eL95sDiWDj+ZR6Js HBvI18TIlErDhTDE9Kgal48p9fTf0KTEJy2rbg66vTtl/ry9m7b/JLP3CJ9BKPRpW3KgbfFFq7/ CAKtTaO1vaTWJi8sNyBMM4SlTOQ3HkCU61Y8QYwjsg9Yrwtg X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: AoqmrX-89RutAoyM8K8Njc69U5ZjwqJ6 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA2MDE1OSBTYWx0ZWRfX1awK6472+xqL fzki99zvVPvvXgKII2Zrt/84mNJd+UuvVUrWblWzgwp5g2e56nisgeAIGAOi0huz4eOHL1pO7vo BveUtn9AD38/46qyyZX8aixVpQDw5TIPTLLSjpOswHyGYJqm9G5pTcIf1e/hiPB69+1nr3xJFc/ 47YdDJ4UZd3Ru24pZgFtwXxiPNOCGHJmzAS3cqnHHChfu5AIMOh0VFoIOXjlsaxzptj4aIiNQ5K 1S5R9dlPNxr1PCSKYviMMhg1j6fVWISFBVE+NiOHPlizdfEVGYxmsDotfxiq8l5gJqS7E3wnHQg CdOBJXGPJLkzjf4a2FHZxrYQiV2UOYY4sAumHqjpSdaS0EnSeXP7A32hxLj0uLRCq376rKjf5ID WvPdP1OJ2yvn2uAn1BwbFQmnuS/Rcy9cZPe4FyPDPWawBAYVV69YkwBJXzeRqZuAhugS5+/Eyd7 4sLRRFDAGJ87PswjExA== X-Authority-Analysis: v=2.4 cv=LbcxKzfi c=1 sm=1 tr=0 ts=69ab0532 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=LGEa-qlQBoucZRe8vqkA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-ORIG-GUID: AoqmrX-89RutAoyM8K8Njc69U5ZjwqJ6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-06_05,2026-03-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 adultscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603060159 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The ubwc_dec_version field has been inherited from the MDSS driver and it is equal to the version of the UBWC decoder in the display block only. Other IP Cores can have different UBWC decoders and so the version would vary between blocks. As the value is no longer used as is not relevant to other UBWC database consumers, drop it from the UBWC database. Signed-off-by: Dmitry Baryshkov --- drivers/soc/qcom/ubwc_config.c | 22 ---------------------- include/linux/soc/qcom/ubwc.h | 2 -- 2 files changed, 24 deletions(-) diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index e63daf748e30..c5c7fcb4d013 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -18,7 +18,6 @@ static const struct qcom_ubwc_cfg_data no_ubwc_data = { static const struct qcom_ubwc_cfg_data kaanapali_data = { .ubwc_enc_version = UBWC_6_0, - .ubwc_dec_version = UBWC_6_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -28,7 +27,6 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = { static const struct qcom_ubwc_cfg_data msm8937_data = { .ubwc_enc_version = UBWC_1_0, - .ubwc_dec_version = UBWC_1_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 | UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, @@ -37,7 +35,6 @@ static const struct qcom_ubwc_cfg_data msm8937_data = { static const struct qcom_ubwc_cfg_data msm8998_data = { .ubwc_enc_version = UBWC_1_0, - .ubwc_dec_version = UBWC_1_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 | UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, @@ -51,7 +48,6 @@ static const struct qcom_ubwc_cfg_data qcm2290_data = { static const struct qcom_ubwc_cfg_data sa8775p_data = { .ubwc_enc_version = UBWC_4_0, - .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, .highest_bank_bit = 13, @@ -60,7 +56,6 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = { static const struct qcom_ubwc_cfg_data sar2130p_data = { .ubwc_enc_version = UBWC_3_0, /* 4.0.2 in hw */ - .ubwc_dec_version = UBWC_4_3, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -70,7 +65,6 @@ static const struct qcom_ubwc_cfg_data sar2130p_data = { static const struct qcom_ubwc_cfg_data sc7180_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -79,7 +73,6 @@ static const struct qcom_ubwc_cfg_data sc7180_data = { static const struct qcom_ubwc_cfg_data sc7280_data = { .ubwc_enc_version = UBWC_3_0, - .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -89,7 +82,6 @@ static const struct qcom_ubwc_cfg_data sc7280_data = { static const struct qcom_ubwc_cfg_data sc8180x_data = { .ubwc_enc_version = UBWC_3_0, - .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 16, @@ -98,7 +90,6 @@ static const struct qcom_ubwc_cfg_data sc8180x_data = { static const struct qcom_ubwc_cfg_data sc8280xp_data = { .ubwc_enc_version = UBWC_4_0, - .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -108,7 +99,6 @@ static const struct qcom_ubwc_cfg_data sc8280xp_data = { static const struct qcom_ubwc_cfg_data sdm670_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 14, @@ -116,7 +106,6 @@ static const struct qcom_ubwc_cfg_data sdm670_data = { static const struct qcom_ubwc_cfg_data sdm845_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 15, @@ -124,7 +113,6 @@ static const struct qcom_ubwc_cfg_data sdm845_data = { static const struct qcom_ubwc_cfg_data sm6115_data = { .ubwc_enc_version = UBWC_1_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 | UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, @@ -134,7 +122,6 @@ static const struct qcom_ubwc_cfg_data sm6115_data = { static const struct qcom_ubwc_cfg_data sm6125_data = { .ubwc_enc_version = UBWC_1_0, - .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 | UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, @@ -143,7 +130,6 @@ static const struct qcom_ubwc_cfg_data sm6125_data = { static const struct qcom_ubwc_cfg_data sm6150_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 14, @@ -151,7 +137,6 @@ static const struct qcom_ubwc_cfg_data sm6150_data = { static const struct qcom_ubwc_cfg_data sm6350_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -160,7 +145,6 @@ static const struct qcom_ubwc_cfg_data sm6350_data = { static const struct qcom_ubwc_cfg_data sm7150_data = { .ubwc_enc_version = UBWC_2_0, - .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 14, @@ -168,7 +152,6 @@ static const struct qcom_ubwc_cfg_data sm7150_data = { static const struct qcom_ubwc_cfg_data sm8150_data = { .ubwc_enc_version = UBWC_3_0, - .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 15, @@ -176,7 +159,6 @@ static const struct qcom_ubwc_cfg_data sm8150_data = { static const struct qcom_ubwc_cfg_data sm8250_data = { .ubwc_enc_version = UBWC_4_0, - .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -187,7 +169,6 @@ static const struct qcom_ubwc_cfg_data sm8250_data = { static const struct qcom_ubwc_cfg_data sm8350_data = { .ubwc_enc_version = UBWC_4_0, - .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -198,7 +179,6 @@ static const struct qcom_ubwc_cfg_data sm8350_data = { static const struct qcom_ubwc_cfg_data sm8550_data = { .ubwc_enc_version = UBWC_4_0, - .ubwc_dec_version = UBWC_4_3, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .ubwc_bank_spread = true, @@ -209,7 +189,6 @@ static const struct qcom_ubwc_cfg_data sm8550_data = { static const struct qcom_ubwc_cfg_data sm8750_data = { .ubwc_enc_version = UBWC_5_0, - .ubwc_dec_version = UBWC_5_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ @@ -219,7 +198,6 @@ static const struct qcom_ubwc_cfg_data sm8750_data = { static const struct qcom_ubwc_cfg_data glymur_data = { .ubwc_enc_version = UBWC_5_0, - .ubwc_dec_version = UBWC_5_0, .ubwc_swizzle = 0, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h index ddd7b15d9ff1..c5f049eab07d 100644 --- a/include/linux/soc/qcom/ubwc.h +++ b/include/linux/soc/qcom/ubwc.h @@ -13,8 +13,6 @@ struct qcom_ubwc_cfg_data { u32 ubwc_enc_version; - /* Can be read from MDSS_BASE + 0x58 */ - u32 ubwc_dec_version; /** * @ubwc_swizzle: Whether to enable level 1, 2 & 3 bank swizzling. -- 2.47.3