From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: harry.wentland@amd.com, louis.chauvet@bootlin.com,
mwen@igalia.com, contact@emersion.fr, alex.hung@amd.com,
daniels@collabora.com, uma.shankar@intel.com,
maarten.lankhorst@intel.com, pekka.paalanen@collabora.com,
pranay.samala@intel.com, swati2.sharma@intel.com,
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Subject: [PATCH 04/10] drm/i915/color: Add support for 1D LUT in SDR planes
Date: Fri, 6 Mar 2026 22:23:01 +0530 [thread overview]
Message-ID: <20260306165307.3233194-5-chaitanya.kumar.borah@intel.com> (raw)
In-Reply-To: <20260306165307.3233194-1-chaitanya.kumar.borah@intel.com>
Extend the SDR plane color pipeline to include pre- and post-CSC
1D LUT blocks.
SDR planes use a smaller LUT size than HDR planes and therefore
initialize the 1D LUT colorops with the appropriate hardware
capacity.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index f368a896d2fc..47b3bcec7b18 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -15,6 +15,7 @@
#define MAX_COLOROP 4
#define PLANE_DEGAMMA_SIZE 128
#define PLANE_GAMMA_SIZE 32
+#define PLANE_DEGAMMA_SIZE_SDR 32
static const struct drm_colorop_funcs intel_colorop_funcs = {
.destroy = intel_colorop_destroy,
@@ -44,7 +45,9 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
};
static const enum intel_color_block sdr_plane_pipeline[] = {
+ INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC_FF,
+ INTEL_PLANE_CB_POST_CSC_LUT,
};
static const u64 intel_plane_supported_csc_ff =
@@ -67,8 +70,10 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
enum intel_color_block id)
{
struct drm_device *dev = plane->dev;
+ struct intel_display *display = to_intel_display(dev);
struct intel_colorop *colorop;
int ret;
+ bool is_hdr = icl_is_hdr_plane(display, to_intel_plane(plane)->id);
colorop = intel_colorop_create(id);
@@ -80,7 +85,9 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
ret = drm_plane_colorop_curve_1d_lut_init(dev,
&colorop->base, plane,
&intel_colorop_funcs,
- PLANE_DEGAMMA_SIZE,
+ is_hdr ?
+ PLANE_DEGAMMA_SIZE :
+ PLANE_DEGAMMA_SIZE_SDR,
DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
DRM_COLOROP_FLAG_ALLOW_BYPASS);
break;
--
2.25.1
next prev parent reply other threads:[~2026-03-06 17:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 16:52 [PATCH 00/10] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-03-06 16:52 ` [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:52 ` [PATCH 02/10] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 03/10] drm/i915/color: Program fixed-function CSC on SDR planes Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` Chaitanya Kumar Borah [this message]
2026-03-08 22:26 ` Claude review: drm/i915/color: Add support for 1D LUT in " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 05/10] drm/i915/color: Fix HDR pre-CSC LUT programming loop Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 06/10] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 07/10] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 08/10] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 09/10] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-06 16:53 ` [PATCH 10/10] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-03-08 22:26 ` Claude review: " Claude Code Review Bot
2026-03-08 22:26 ` Claude review: drm/i915/color: Enable SDR plane color pipeline Claude Code Review Bot
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