[PATCH RFC 0/3] Some updates over DP AUX Transactions

[Arun R Murthy <arun.r.murthy@intel.com>]

Based on the discussions/comments on the patch
https://lore.kernel.org/intel-xe/aaVWbdt1vOFxGAb1@ideak-desk.lan/
in order to address the real HW(DPTX) generated timeout and adress the
fix, this series is targetted.
Along with this it was noticed that the the AUX power request bit in the
port control register is being touched outside the power well framework.
The limitation due to the way aux port control register was programmed.
Replacing the aux control register write to read/mask/write thereby
writing only the required bits.

Note: This is RFC and full round of testing the pending.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
Arun R Murthy (3):
      drm/display/dp: Export function to wake the sink AUX_CH
      drm/i915/dp: On AUX_CH tx timeout, wake up the sink
      drm/i915/dp: Configure PORT_AUX_CTL and then trigger the tx

 drivers/gpu/drm/display/drm_dp_helper.c            | 36 +++++++++
 drivers/gpu/drm/i915/display/intel_display_types.h |  6 +-
 drivers/gpu/drm/i915/display/intel_dp_aux.c        | 94 +++++++++++++++-------
 drivers/gpu/drm/i915/display/intel_psr.c           | 29 ++++---
 include/drm/display/drm_dp_helper.h                |  1 +
 5 files changed, 123 insertions(+), 43 deletions(-)
---
base-commit: 6884fe03ff2bc5a2f501ba4710f950dd4933ac84
change-id: 20260309-dp_aux_timeout-9d5b1b35a0d8

Best regards,
-- 
Arun R Murthy <arun.r.murthy@intel.com>