From: "David E. Box" <david.e.box@linux.intel.com>
To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com,
irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com,
srinivas.pandruvada@linux.intel.com,
intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
xi.pardee@linux.intel.com
Cc: david.e.box@linux.intel.com, hansg@kernel.org,
linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org
Subject: [PATCH 19/22] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe
Date: Thu, 12 Mar 2026 18:51:58 -0700 [thread overview]
Message-ID: <20260313015202.3660072-20-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com>
From: Xi Pardee <xi.pardee@linux.intel.com>
Switch the readiness synchronization from a global device_probed flag to
per-index devid publication. This is required because a subsequent patch
makes probe reentrant, so a single global flag can no longer reliably
signal completion.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
---
.../platform/x86/intel/pmc/ssram_telemetry.c | 34 ++++++++-----------
1 file changed, 14 insertions(+), 20 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
index 7db98037c521..246efdcf6950 100644
--- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c
+++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
@@ -37,7 +37,6 @@ static const struct ssram_type pci_main = {
};
static struct pmc_ssram_telemetry pmc_ssram_telems[3];
-static bool device_probed;
static inline u64 get_base(void __iomem *addr, u32 offset)
{
@@ -52,8 +51,13 @@ static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int pmc_i
pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
devid = readw(ssram + SSRAM_DEVID_OFFSET);
- pmc_ssram_telems[pmc_idx].devid = devid;
pmc_ssram_telems[pmc_idx].base_addr = pwrm_base;
+ /*
+ * Memory barrier is used to ensure the correct write order between base_addr
+ * and devid.
+ */
+ smp_wmb();
+ pmc_ssram_telems[pmc_idx].devid = devid;
}
static int
@@ -151,32 +155,28 @@ static int pmc_ssram_telemetry_pci_init(struct pci_dev *pcidev)
* * 0 - Success
* * -EAGAIN - Probe function has not finished yet. Try again.
* * -EINVAL - Invalid pmc_idx
- * * -ENODEV - PMC device is not available
*/
int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_idx,
struct pmc_ssram_telemetry *pmc_ssram_telemetry)
{
+ if (pmc_idx >= MAX_NUM_PMC)
+ return -EINVAL;
+
/*
* PMCs are discovered in probe function. If this function is called before
- * probe function complete, the result would be invalid. Use device_probed
- * variable to avoid this case. Return -EAGAIN to inform the consumer to call
+ * probe function complete, the result would be invalid. Use devid to avoid
+ * this case. Return -EAGAIN to inform the consumer to call
* again later.
*/
- if (!device_probed)
+ if (!pmc_ssram_telems[pmc_idx].devid)
return -EAGAIN;
+ pmc_ssram_telemetry->devid = pmc_ssram_telems[pmc_idx].devid;
/*
* Memory barrier is used to ensure the correct read order between
- * device_probed variable and PMC info.
+ * devid variable and base_addr.
*/
smp_rmb();
- if (pmc_idx >= MAX_NUM_PMC)
- return -EINVAL;
-
- if (!pmc_ssram_telems[pmc_idx].devid)
- return -ENODEV;
-
- pmc_ssram_telemetry->devid = pmc_ssram_telems[pmc_idx].devid;
pmc_ssram_telemetry->base_addr = pmc_ssram_telems[pmc_idx].base_addr;
return 0;
}
@@ -209,12 +209,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pcidev, const struct pci_de
ret = -EINVAL;
probe_finish:
- /*
- * Memory barrier is used to ensure the correct write order between PMC info
- * and device_probed variable.
- */
- smp_wmb();
- device_probed = true;
return ret;
}
--
2.43.0
next prev parent reply other threads:[~2026-03-13 1:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 1:51 [PATCH 00/22] platform/x86/intel: Add ACPI PMT discovery support and enable NVL PMC telemetry David E. Box
2026-03-13 1:51 ` [PATCH 01/22] platform/x86/intel/vsec: Refactor base_addr handling David E. Box
2026-03-13 1:51 ` [PATCH 02/22] platform/x86/intel/vsec: Make driver_data info const David E. Box
2026-03-13 1:51 ` [PATCH 03/22] platform/x86/intel/vsec: Decouple add/link helpers from PCI David E. Box
2026-03-13 1:51 ` [PATCH 04/22] platform/x86/intel/vsec: Switch exported helpers from pci_dev to device David E. Box
2026-03-13 1:51 ` [PATCH 05/22] platform/x86/intel/vsec: Return real error codes from registration path David E. Box
2026-03-13 1:51 ` [PATCH 06/22] platform/x86/intel/vsec: Plumb ACPI PMT discovery tables through vsec David E. Box
2026-03-13 1:51 ` [PATCH 07/22] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-03-13 1:51 ` [PATCH 08/22] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-03-13 1:51 ` [PATCH 09/22] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-03-13 1:51 ` [PATCH 10/22] platform/x86/intel/pmt: Move header decode into common helper David E. Box
2026-03-13 1:51 ` [PATCH 11/22] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-03-13 1:51 ` [PATCH 12/22] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-03-13 1:51 ` [PATCH 13/22] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-03-13 1:51 ` [PATCH 14/22] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-03-13 1:51 ` [PATCH 15/22] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-03-13 1:51 ` [PATCH 16/22] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-03-13 1:51 ` [PATCH 17/22] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper David E. Box
2026-03-13 1:51 ` [PATCH 18/22] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-03-13 1:51 ` David E. Box [this message]
2026-03-13 1:51 ` [PATCH 20/22] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-03-13 1:52 ` [PATCH 21/22] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-03-13 1:52 ` [PATCH 22/22] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
2026-03-13 3:42 ` Claude review: platform/x86/intel: Add ACPI PMT discovery support and enable NVL PMC telemetry Claude Code Review Bot
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