* [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC
@ 2026-03-13 12:08 Sibi Sankar
2026-03-13 12:08 ` [PATCH V5 1/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP Sibi Sankar
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani
Qualcomm Glymur SoC variants predominantly boot Linux at EL2. This means
that the firmware streams of the remote processors are managed in kernel
and not in Gunyah hypervisor. Given that the Peripheral Image Loader for
Qualcomm SoCs now support running Linux Host at EL2 [1], this series
documents and enables ADSP and CDSP on Qualcomm Glymur SoCs with its
fastrpc nodes. A few variants of the SoC are expected to run Linux at EL1
hence the iommus properties are left optional.
[1] - https://lore.kernel.org/all/20260105-kvmrprocv10-v10-0-022e96815380@oss.qualcomm.com/
Changes in v5:
- Fix commit messages (patch 1/2) to accurately describe compatibility [Krzysztof]
- Link to v4: https://lore.kernel.org/lkml/20260310033617.3108675-1-sibi.sankar@oss.qualcomm.com/
Changes in v4:
- Fix SID used in ADSP/CDSP for correctness [Konrad]
- Link to v3: https://lore.kernel.org/lkml/20260129001358.770053-1-sibi.sankar@oss.qualcomm.com/
Changes in v3:
- A few variants of the SoC are expected to run Linux at EL1 hence the
iommus properties are left optional.
- Add fastrpc bindings and nodes.
- Link to v2: https://lore.kernel.org/all/20251029-knp-remoteproc-v2-0-6c81993b52ea@oss.qualcomm.com/
Changes in v2:
- Combined into Kaanapali series since they are fully compatible.
- Link to v1: https://lore.kernel.org/all/20250924183726.509202-1-sibi.sankar@oss.qualcomm.com/
Sibi Sankar (5):
dt-bindings: remoteproc: qcom,sm8550-pas: Add Glymur ADSP
dt-bindings: remoteproc: qcom,sm8550-pas: Add Glymur CDSP
dt-bindings: misc: qcom,fastrpc: Add compatible for Glymur
arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC
arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP
.../bindings/misc/qcom,fastrpc.yaml | 11 +-
.../bindings/remoteproc/qcom,sm8550-pas.yaml | 4 +
arch/arm64/boot/dts/qcom/glymur-crd.dts | 14 +
arch/arm64/boot/dts/qcom/glymur.dtsi | 286 ++++++++++++++++++
4 files changed, 312 insertions(+), 3 deletions(-)
base-commit: 5c9e55fecf9365890c64f14761a80f9413a3b1d1
--
2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH V5 1/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
@ 2026-03-13 12:08 ` Sibi Sankar
2026-03-13 21:07 ` Claude review: " Claude Code Review Bot
2026-03-13 12:08 ` [PATCH V5 2/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur CDSP Sibi Sankar
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani
Document compatible for Qualcomm Glymur ADSP PAS which is compatible
with SM8750, which can fallback to SM8550 except for the one additional
interrupt ("shutdown-ack").
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
---
.../devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index b117c82b057b..fb6e0b4f54e8 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -29,6 +29,7 @@ properties:
- qcom,x1e80100-cdsp-pas
- items:
- enum:
+ - qcom,glymur-adsp-pas
- qcom,kaanapali-adsp-pas
- qcom,sm8750-adsp-pas
- const: qcom,sm8550-adsp-pas
@@ -101,6 +102,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,glymur-adsp-pas
- qcom,kaanapali-adsp-pas
- qcom,kaanapali-cdsp-pas
- qcom,sm8750-adsp-pas
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH V5 2/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur CDSP
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
2026-03-13 12:08 ` [PATCH V5 1/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP Sibi Sankar
@ 2026-03-13 12:08 ` Sibi Sankar
2026-03-13 21:07 ` Claude review: " Claude Code Review Bot
2026-03-13 12:08 ` [PATCH V5 3/5] dt-bindings: misc: qcom, fastrpc: Add compatible for Glymur Sibi Sankar
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani
Document compatible for Qualcomm Glymur CDSP PAS which is compatible
with SM8550 SoC except for the one additional interrupt ("shutdown-ack").
Similar to the Qualcomm Kaanapali SoC, "global_sync_mem" is not managed
by the kernel so it remains unlisted.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
---
.../devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index fb6e0b4f54e8..6a29d239ef41 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -35,6 +35,7 @@ properties:
- const: qcom,sm8550-adsp-pas
- items:
- enum:
+ - qcom,glymur-cdsp-pas
- qcom,kaanapali-cdsp-pas
- const: qcom,sm8550-cdsp-pas
- items:
@@ -103,6 +104,7 @@ allOf:
contains:
enum:
- qcom,glymur-adsp-pas
+ - qcom,glymur-cdsp-pas
- qcom,kaanapali-adsp-pas
- qcom,kaanapali-cdsp-pas
- qcom,sm8750-adsp-pas
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH V5 3/5] dt-bindings: misc: qcom, fastrpc: Add compatible for Glymur
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
2026-03-13 12:08 ` [PATCH V5 1/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP Sibi Sankar
2026-03-13 12:08 ` [PATCH V5 2/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur CDSP Sibi Sankar
@ 2026-03-13 12:08 ` Sibi Sankar
2026-03-13 21:07 ` Claude review: " Claude Code Review Bot
2026-03-13 12:08 ` [PATCH V5 4/5] arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC Sibi Sankar
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani, Krzysztof Kozlowski
Document compatible for Qualcomm Glymur fastrpc which is fully compatible
with Qualcomm Kaanapali fastrpc.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../devicetree/bindings/misc/qcom,fastrpc.yaml | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
index d8e47db677cc..ca830dd06de2 100644
--- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
+++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
@@ -18,9 +18,14 @@ description: |
properties:
compatible:
- enum:
- - qcom,kaanapali-fastrpc
- - qcom,fastrpc
+ oneOf:
+ - enum:
+ - qcom,kaanapali-fastrpc
+ - qcom,fastrpc
+ - items:
+ - enum:
+ - qcom,glymur-fastrpc
+ - const: qcom,kaanapali-fastrpc
label:
enum:
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH V5 4/5] arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
` (2 preceding siblings ...)
2026-03-13 12:08 ` [PATCH V5 3/5] dt-bindings: misc: qcom, fastrpc: Add compatible for Glymur Sibi Sankar
@ 2026-03-13 12:08 ` Sibi Sankar
2026-03-13 21:07 ` Claude review: " Claude Code Review Bot
2026-03-13 12:08 ` [PATCH V5 5/5] arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP Sibi Sankar
2026-03-13 21:07 ` Claude review: Enable ADSP and CDSP for Glymur SoC Claude Code Review Bot
5 siblings, 1 reply; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani, Abel Vesa, Konrad Dybcio
Add remoteproc PAS loader for ADSP and CDSP with its fastrpc nodes.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 286 +++++++++++++++++++++++++++
1 file changed, 286 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index e269cec7942c..ed384d5d9d37 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -3346,6 +3346,122 @@ ipcc: mailbox@3e04000 {
#mbox-cells = <2>;
};
+ remoteproc_adsp: remoteproc@6800000 {
+ compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
+ reg = <0x0 0x06800000 0x0 0x10000>;
+
+ iommus = <&apps_smmu 0x1000 0x0>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+ power-domains = <&rpmhpd RPMHPD_LCX>,
+ <&rpmhpd RPMHPD_LMX>;
+ power-domain-names = "lcx",
+ "lmx";
+
+ memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ remoteproc_adsp_glink: glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&ipcc IPCC_MPROC_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ qcom,remote-pid = <2>;
+
+ label = "lpass";
+
+ fastrpc {
+ compatible = "qcom,glymur-fastrpc", "qcom,kaanapali-fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "adsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+
+ iommus = <&apps_smmu 0x1003 0x80>,
+ <&apps_smmu 0x1063 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+
+ iommus = <&apps_smmu 0x1004 0x80>,
+ <&apps_smmu 0x1064 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+
+ iommus = <&apps_smmu 0x1005 0x80>,
+ <&apps_smmu 0x1065 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+
+ iommus = <&apps_smmu 0x1006 0x80>,
+ <&apps_smmu 0x1066 0x20>;
+ dma-coherent;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+
+ iommus = <&apps_smmu 0x1007 0x40>,
+ <&apps_smmu 0x1067 0x0>,
+ <&apps_smmu 0x1087 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@8 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+
+ iommus = <&apps_smmu 0x1008 0x80>,
+ <&apps_smmu 0x1068 0x20>;
+ dma-coherent;
+ };
+ };
+ };
+ };
+
lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,glymur-lpass-lpiaon-noc";
reg = <0x0 0x07400000 0x0 0x19080>;
@@ -4692,6 +4808,176 @@ nsp_noc: interconnect@320c0000 {
#interconnect-cells = <2>;
};
+ remoteproc_cdsp: remoteproc@32300000 {
+ compatible = "qcom,glymur-cdsp-pas", "qcom,sm8550-cdsp-pas";
+ reg = <0x0 0x32300000 0x0 0x10000>;
+
+ iommus = <&apps_smmu 0x2400 0x400>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interconnects = <&nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_NSP>;
+ power-domain-names = "cx",
+ "mxc",
+ "nsp";
+
+ memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;
+ qcom,qmp = <&aoss_qmp>;
+ qcom,smem-states = <&smp2p_cdsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_MPROC_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+ qcom,remote-pid = <5>;
+ label = "cdsp";
+
+ fastrpc {
+ compatible = "qcom,glymur-fastrpc", "qcom,kaanapali-fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "cdsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+
+ iommus = <&apps_smmu 0x2401 0x440>,
+ <&apps_smmu 0x1961 0x0>,
+ <&apps_smmu 0x19c1 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+
+ iommus = <&apps_smmu 0x2402 0x440>,
+ <&apps_smmu 0x1962 0x0>,
+ <&apps_smmu 0x19c2 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+
+ iommus = <&apps_smmu 0x2403 0x440>,
+ <&apps_smmu 0x1963 0x0>,
+ <&apps_smmu 0x19c3 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+
+ iommus = <&apps_smmu 0x2404 0x440>,
+ <&apps_smmu 0x1964 0x0>,
+ <&apps_smmu 0x19c4 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+
+ iommus = <&apps_smmu 0x2405 0x440>,
+ <&apps_smmu 0x1965 0x0>,
+ <&apps_smmu 0x19c5 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+
+ iommus = <&apps_smmu 0x2406 0x440>,
+ <&apps_smmu 0x1966 0x0>,
+ <&apps_smmu 0x19c6 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@7 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+
+ iommus = <&apps_smmu 0x2407 0x440>,
+ <&apps_smmu 0x1967 0x0>,
+ <&apps_smmu 0x19c7 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@8 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+
+ iommus = <&apps_smmu 0x2408 0x440>,
+ <&apps_smmu 0x1968 0x0>,
+ <&apps_smmu 0x19c8 0x0>;
+ dma-coherent;
+ };
+
+ /* note: compute-cb@9 is secure */
+
+ compute-cb@10 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <10>;
+
+ iommus = <&apps_smmu 0x240c 0x440>,
+ <&apps_smmu 0x196c 0x0>,
+ <&apps_smmu 0x19cc 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@11 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
+
+ iommus = <&apps_smmu 0x240d 0x440>,
+ <&apps_smmu 0x196d 0x0>,
+ <&apps_smmu 0x19cd 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@12 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+
+ iommus = <&apps_smmu 0x240e 0x440>,
+ <&apps_smmu 0x196e 0x0>,
+ <&apps_smmu 0x19ce 0x0>;
+ dma-coherent;
+ };
+ };
+ };
+ };
+
imem: sram@81e08000 {
compatible = "mmio-sram";
reg = <0x0 0x81e08600 0x0 0x300>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH V5 5/5] arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
` (3 preceding siblings ...)
2026-03-13 12:08 ` [PATCH V5 4/5] arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC Sibi Sankar
@ 2026-03-13 12:08 ` Sibi Sankar
2026-03-13 21:07 ` Claude review: " Claude Code Review Bot
2026-03-13 21:07 ` Claude review: Enable ADSP and CDSP for Glymur SoC Claude Code Review Bot
5 siblings, 1 reply; 12+ messages in thread
From: Sibi Sankar @ 2026-03-13 12:08 UTC (permalink / raw)
To: robh, srini, amahesh, krzk+dt, conor+dt, andersson, konradybcio
Cc: mathieu.poirier, linux-arm-msm, dri-devel, devicetree,
linux-kernel, linux-remoteproc, mani, Abel Vesa, Konrad Dybcio
Enable ADSP and CDSP on Glymur CRD board.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur-crd.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
index 877945319012..6b7f91a3a968 100644
--- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
+++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
@@ -485,6 +485,20 @@ &pon_resin {
status = "okay";
};
+&remoteproc_adsp {
+ firmware-name = "qcom/glymur/adsp.mbn",
+ "qcom/glymur/adsp_dtb.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/glymur/cdsp.mbn",
+ "qcom/glymur/cdsp_dtb.mbn";
+
+ status = "okay";
+};
+
&tlmm {
gpio-reserved-ranges = <4 4>, /* EC TZ Secure I3C */
<10 2>, /* OOB UART */
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Claude review: Enable ADSP and CDSP for Glymur SoC
2026-03-13 12:08 [PATCH V5 0/5] Enable ADSP and CDSP for Glymur SoC Sibi Sankar
` (4 preceding siblings ...)
2026-03-13 12:08 ` [PATCH V5 5/5] arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
5 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Overall Series Review
Subject: Enable ADSP and CDSP for Glymur SoC
Author: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Patches: 6
Reviewed: 2026-03-14T07:07:31.775466
---
This is a clean, well-structured V5 series that adds ADSP and CDSP remoteproc support for the Qualcomm Glymur SoC. The series follows the established pattern of binding-first, then DTS nodes, then board enablement. The patches have appropriate reviews/acks (patches 3-5 have Reviewed-by tags from Krzysztof Kozlowski, Abel Vesa, and Konrad Dybcio). The compatibility fallback chains are correctly documented in the bindings and used consistently in the DTS. No significant issues found — the series looks ready for merge, with one minor observation below.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
* Claude review: dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP
2026-03-13 12:08 ` [PATCH V5 1/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur ADSP Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
0 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Patch Review
Adds `qcom,glymur-adsp-pas` to the sm8550-pas binding with fallback to `qcom,sm8550-adsp-pas`.
The compatible is added in two places:
1. The compatible property items group (alongside kaanapali and sm8750):
```yaml
- qcom,glymur-adsp-pas
- qcom,kaanapali-adsp-pas
- qcom,sm8750-adsp-pas
- const: qcom,sm8550-adsp-pas
```
2. The allOf conditional that allows 6 interrupts (the extra "shutdown-ack"):
```yaml
- qcom,glymur-adsp-pas
- qcom,kaanapali-adsp-pas
```
Both additions are correctly placed. The commit message accurately describes the compatibility: Glymur ADSP shares the same fallback chain as SM8750 ADSP (both fall back to SM8550-adsp-pas), differing from the base SM8550 only in the additional "shutdown-ack" interrupt.
No issues.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
* Claude review: dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur CDSP
2026-03-13 12:08 ` [PATCH V5 2/5] dt-bindings: remoteproc: qcom, sm8550-pas: Add Glymur CDSP Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
0 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Patch Review
Adds `qcom,glymur-cdsp-pas` to the sm8550-pas binding with fallback to `qcom,sm8550-cdsp-pas`.
The compatible is added to:
1. The items group for CDSP with sm8550 fallback:
```yaml
- qcom,glymur-cdsp-pas
- qcom,kaanapali-cdsp-pas
- const: qcom,sm8550-cdsp-pas
```
2. The allOf conditional for 6 interrupts (same section as patch 1).
Note that Glymur CDSP falls back to `sm8550-cdsp-pas` (not `sm8650-cdsp-pas` like SM8750 CDSP does). This is a meaningful distinction from SM8750 CDSP and the commit message correctly captures this: "compatible with SM8550 SoC except for the one additional interrupt."
No issues.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
* Claude review: dt-bindings: misc: qcom, fastrpc: Add compatible for Glymur
2026-03-13 12:08 ` [PATCH V5 3/5] dt-bindings: misc: qcom, fastrpc: Add compatible for Glymur Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
0 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Patch Review
Converts the fastrpc compatible from a simple `enum` to `oneOf` to support `qcom,glymur-fastrpc` with `qcom,kaanapali-fastrpc` fallback:
```yaml
oneOf:
- enum:
- qcom,kaanapali-fastrpc
- qcom,fastrpc
- items:
- enum:
- qcom,glymur-fastrpc
- const: qcom,kaanapali-fastrpc
```
The restructuring is correct. The existing single-string compatibles are preserved in the `enum` branch, and the new two-string compatible is added as an `items` branch. Has Reviewed-by from Krzysztof Kozlowski.
**Minor observation**: The `enum` wrapping `qcom,glymur-fastrpc` is technically unnecessary when there's only one entry — a bare `const: qcom,glymur-fastrpc` would suffice. However, using `enum` is a common DT-binding convention that allows for easy future additions, so this is acceptable style.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
* Claude review: arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC
2026-03-13 12:08 ` [PATCH V5 4/5] arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
0 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Patch Review
This is the main DTS patch adding 286 lines to `glymur.dtsi`. Key observations:
**ADSP node** (`remoteproc@6800000`):
- Compatible: `"qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas"` — matches binding.
- 6 interrupts including "shutdown-ack" — matches the binding's maxItems: 6 conditional.
- Power domains: `lcx`, `lmx` — matches the sm8550-adsp-pas power domain constraint.
- IOMMU: `<&apps_smmu 0x1000 0x0>` — optional per cover letter, present here.
- Fastrpc compute CBs 3-8 with dual IOMMU entries and `dma-coherent` — consistent pattern.
- CB 7 has three IOMMU entries with different masks (`0x40`, `0x0`, `0x0`) versus the other CBs (`0x80`, `0x20`) — this is likely intentional as a secure/non-secure split.
**CDSP node** (`remoteproc@32300000`):
- Compatible: `"qcom,glymur-cdsp-pas", "qcom,sm8550-cdsp-pas"` — matches binding.
- 6 interrupts including "shutdown-ack" — matches binding.
- Power domains: `cx`, `mxc`, `nsp` (3 domains) — matches the sm8550-cdsp-pas constraint.
- Fastrpc compute CBs 1-8, 10-12 with CB 9 documented as secure:
```c
/* note: compute-cb@9 is secure */
```
- The SID gap from 0x2408 (CB 8) to 0x240c (CB 10) accounts for 3 secure CBs in the SID space (0x2409–0x240b), which is a standard Qualcomm CDSP IOMMU layout.
Both nodes have `status = "disabled"` as expected for SoC-level dtsi.
No issues. Reviewed-by from both Abel Vesa and Konrad Dybcio.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
* Claude review: arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP
2026-03-13 12:08 ` [PATCH V5 5/5] arm64: dts: qcom: glymur-crd: Enable ADSP and CDSP Sibi Sankar
@ 2026-03-13 21:07 ` Claude Code Review Bot
0 siblings, 0 replies; 12+ messages in thread
From: Claude Code Review Bot @ 2026-03-13 21:07 UTC (permalink / raw)
To: dri-devel-reviews
Patch Review
Simple board-level enablement:
```dts
&remoteproc_adsp {
firmware-name = "qcom/glymur/adsp.mbn",
"qcom/glymur/adsp_dtb.mbn";
status = "okay";
};
&remoteproc_cdsp {
firmware-name = "qcom/glymur/cdsp.mbn",
"qcom/glymur/cdsp_dtb.mbn";
status = "okay";
};
```
Firmware paths follow the standard `qcom/<soc>/<proc>.mbn` convention. The firmware-name property with two entries (core firmware + DTB firmware) matches the binding's `string-array` definition. Both nodes are properly enabled with `status = "okay"`.
No issues. Reviewed-by from both Abel Vesa and Konrad Dybcio.
---
Generated by Claude Code Patch Reviewer
^ permalink raw reply [flat|nested] 12+ messages in thread
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