From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB7F6108E1E3 for ; Thu, 19 Mar 2026 10:40:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33FFD10E952; Thu, 19 Mar 2026 10:40:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=rock-chips.com header.i=@rock-chips.com header.b="OGAoIjpg"; dkim-atps=neutral Received: from mail-m49238.qiye.163.com (mail-m49238.qiye.163.com [45.254.49.238]) by gabe.freedesktop.org (Postfix) with ESMTPS id A765310E92C for ; Thu, 19 Mar 2026 10:40:42 +0000 (UTC) Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 3790344b6; Thu, 19 Mar 2026 18:40:38 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, alchark@gmail.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, kever.yang@rock-chips.com, heiko.stuebner@cherry.de, tomeu@tomeuvizoso.net, amadeus@jmu.edu.cn, michael.riesch@collabora.com, didi.debian@cknow.org, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v2 2/9] arm64: dts: rockchip: Add missing clock "hclk" for RK3588 eDP0 nodes. Date: Thu, 19 Mar 2026 18:40:24 +0800 Message-Id: <20260319104031.1986946-3-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260319104031.1986946-1-damon.ding@rock-chips.com> References: <20260319104031.1986946-1-damon.ding@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Tid: 0a9d05aeda1503a3kunm32a99f093bee5e X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGU0ZS1ZMSR5JSR4dSUgeT0lWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSEpKQk 1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=OGAoIjpgx5GJT1mOZZpoMLQG1OokN8B6OMoPBuFsUNQa0rNeYsSpz2I/wLZ1Ru7Og5tXscNVfJqr1DOedUNqj/MPtLckzl39RbKd46MYHIVCWP/LmesgucAjWbFr988hX7kb7WTovlECow0G8Nn/tf/sSumndnGGrqAyP46H/nw=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=qjHNHND5n0fiBlRQB27XFnIhf37uCnsTVXP7smWHdd8=; h=date:mime-version:subject:message-id:from; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The RK3588 eDP controller needs the video datapath clock "hclk" to work well. Previously, it works without explicitly adding this clock because the 'rockchip,vo-grf = <&vo1_grf>' property implicitly enables HCLK_VO1. Fixes: dc79d3d5e7c7 ("arm64: dts: rockchip: Add eDP0 node for RK3588") Signed-off-by: Damon Ding --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index 2a7921793020..4cf87d0c82cd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1648,8 +1648,8 @@ hdmi0_out: port@1 { edp0: edp@fdec0000 { compatible = "rockchip,rk3588-edp"; reg = <0x0 0xfdec0000 0x0 0x1000>; - clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>; - clock-names = "dp", "pclk"; + clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>, <&cru HCLK_VO1>; + clock-names = "dp", "pclk", "hclk"; interrupts = ; phys = <&hdptxphy0>; phy-names = "dp"; -- 2.34.1