From: Deborah Brouwer <deborah.brouwer@collabora.com>
To: dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org,
Boqun Feng <boqun@kernel.org>
Cc: Danilo Krummrich <dakr@kernel.org>,
Alice Ryhl <aliceryhl@google.com>,
Daniel Almeida <daniel.almeida@collabora.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Miguel Ojeda <ojeda@kernel.org>, Gary Guo <gary@garyguo.net>,
Björn Roy Baron <bjorn3_gh@protonmail.com>,
Benno Lossin <lossin@kernel.org>,
Andreas Hindborg <a.hindborg@kernel.org>,
Trevor Gross <tmgross@umich.edu>,
Steven Price <steven.price@arm.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Dirk Behme <dirk.behme@gmail.com>,
Alexandre Courbot <acourbot@nvidia.com>,
Deborah Brouwer <deborah.brouwer@collabora.com>,
Boqun Feng <boqun@kernel.org>
Subject: [PATCH v3 02/12] drm/tyr: Print GPU_ID without filtering
Date: Mon, 23 Mar 2026 17:18:04 -0700 [thread overview]
Message-ID: <20260323-b4-tyr-use-register-macro-v3-v3-2-a87daf9e4701@collabora.com> (raw)
In-Reply-To: <20260323-b4-tyr-use-register-macro-v3-v3-0-a87daf9e4701@collabora.com>
Currently, Tyr prints just the upper 16 bits of the GPU_ID register,
namely, ARCH_MAJOR, ARCH_MINOR, ARCH_REV, and PRODUCT_MAJOR. This matches
the id printed by the panthor driver.
To avoid the manual bit shift, just print the full GPU_ID register. This
prints all of the same information and adds the VERSION_MAJOR,
VERSION_MINOR, and VERSION_STATUS.
Before this change:
mali-g610 id 0xa867 major 0x0 minor 0x0 status 0x5
After this change:
mali-g610 GPU_ID 0xa8670005 major 0x0 minor 0x0 status 0x5
Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com>
---
drivers/gpu/drm/tyr/gpu.rs | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/tyr/gpu.rs b/drivers/gpu/drm/tyr/gpu.rs
index 66fd6c016c62abe3c34669a2e47b680c3a3f873d..4a50055b415c693a89cb99dba241b21351a14149 100644
--- a/drivers/gpu/drm/tyr/gpu.rs
+++ b/drivers/gpu/drm/tyr/gpu.rs
@@ -124,9 +124,9 @@ pub(crate) fn gpu_info_log(dev: &Device<Bound>, iomem: &Devres<IoMem>) -> Result
dev_info!(
dev,
- "mali-{} id 0x{:x} major 0x{:x} minor 0x{:x} status 0x{:x}",
+ "mali-{} GPU_ID 0x{:x} major 0x{:x} minor 0x{:x} status 0x{:x}",
model_name,
- gpu_id.into_raw() >> 16,
+ gpu_id.into_raw(),
gpu_id.ver_major().get(),
gpu_id.ver_minor().get(),
gpu_id.ver_status().get()
--
2.52.0
next prev parent reply other threads:[~2026-03-24 0:18 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 0:18 [PATCH v3 00/12] drm/tyr: Use register! macro Deborah Brouwer
2026-03-24 0:18 ` [PATCH v3 01/12] drm/tyr: Use register! macro for GPU_CONTROL Deborah Brouwer
2026-03-24 9:56 ` Boris Brezillon
2026-03-24 11:23 ` Danilo Krummrich
2026-03-24 12:06 ` Boris Brezillon
2026-03-24 17:31 ` Danilo Krummrich
2026-03-24 18:15 ` Boris Brezillon
2026-03-24 19:03 ` Danilo Krummrich
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` Deborah Brouwer [this message]
2026-03-24 9:54 ` [PATCH v3 02/12] drm/tyr: Print GPU_ID without filtering Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 03/12] drm/tyr: Set interconnect coherency during probe Deborah Brouwer
2026-03-24 9:55 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 04/12] drm/tyr: Use register! macro for JOB_CONTROL Deborah Brouwer
2026-03-24 10:00 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 05/12] drm/tyr: Use register! macro for MMU_CONTROL Deborah Brouwer
2026-03-24 10:01 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 06/12] drm/tyr: Remove custom register struct Deborah Brouwer
2026-03-24 10:02 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 07/12] drm/tyr: Add MMU address space registers Deborah Brouwer
2026-03-24 10:03 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 08/12] drm/tyr: Add fields for MEMATTR register Deborah Brouwer
2026-03-24 10:05 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 09/12] drm/tyr: Add fields for COMMAND register Deborah Brouwer
2026-03-24 10:09 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 10/12] drm/tyr: Add fields for FAULTSTATUS register Deborah Brouwer
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 11/12] drm/tyr: Add fields for TRANSCFG register Deborah Brouwer
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 0:18 ` [PATCH v3 12/12] drm/tyr: Add DOORBELL_BLOCK registers Deborah Brouwer
2026-03-24 10:10 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
2026-03-24 10:58 ` [PATCH v3 00/12] drm/tyr: Use register! macro Alice Ryhl
2026-03-24 12:35 ` Boris Brezillon
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
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