From: Thomas Zimmermann <tzimmermann@suse.de>
To: jfalempe@redhat.com, airlied@redhat.com,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
airlied@gmail.com, simona@ffwll.ch
Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann <tzimmermann@suse.de>
Subject: [PATCH 12/15] drm/ast: Gen4: Fix open-coded register access
Date: Mon, 23 Mar 2026 16:56:25 +0100 [thread overview]
Message-ID: <20260323160407.245773-13-tzimmermann@suse.de> (raw)
In-Reply-To: <20260323160407.245773-1-tzimmermann@suse.de>
Replace all open-coded access to MCR and SCU registers in Gen4 with the
appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR and SCU
register constants. Name variables according to registers.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/ast/ast_2300.c | 24 +++++++++---------------
drivers/gpu/drm/ast/ast_reg.h | 1 +
2 files changed, 10 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_2300.c b/drivers/gpu/drm/ast/ast_2300.c
index 96d9909d942c..cbeac6990c27 100644
--- a/drivers/gpu/drm/ast/ast_2300.c
+++ b/drivers/gpu/drm/ast/ast_2300.c
@@ -1245,22 +1245,15 @@ static void ast_post_chip_2300(struct ast_device *ast)
reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
if ((reg & 0x80) == 0) {/* vga only */
- ast_write32(ast, 0xf004, AST_REG_MCR00);
- ast_write32(ast, 0xf000, 0x1);
- ast_write32(ast, 0x12000, 0x1688a8a8);
- do {
- ;
- } while (ast_read32(ast, 0x12000) != 0x1);
+ u32 scu008, scu040;
- ast_write32(ast, 0x10000, 0xfc600309);
- do {
- ;
- } while (ast_read32(ast, 0x10000) != 0x1);
+ ast_moutdwm_poll(ast, AST_REG_SCU000, AST_REG_SCU000_PROTECTION_KEY, 0x01);
+ ast_moutdwm_poll(ast, AST_REG_MCR00, AST_REG_MCR00_PROTECTION_KEY, 0x01);
/* Slow down CPU/AHB CLK in VGA only mode */
- temp = ast_read32(ast, 0x12008);
- temp |= 0x73;
- ast_write32(ast, 0x12008, temp);
+ scu008 = ast_mindwm(ast, AST_REG_SCU008);
+ scu008 |= 0x00000073;
+ ast_moutdwm(ast, AST_REG_SCU008, scu008);
param.dram_freq = 396;
param.dram_type = AST_DDR3;
@@ -1306,8 +1299,9 @@ static void ast_post_chip_2300(struct ast_device *ast)
ddr2_init(ast, ¶m);
}
- temp = ast_mindwm(ast, AST_REG_SCU040);
- ast_moutdwm(ast, AST_REG_SCU040, temp | 0x40);
+ scu040 = ast_mindwm(ast, AST_REG_SCU040);
+ scu040 |= 0x00000040;
+ ast_moutdwm(ast, AST_REG_SCU040, scu040);
}
/* wait ready */
diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
index 9ebdbbde9a47..c3473cad4545 100644
--- a/drivers/gpu/drm/ast/ast_reg.h
+++ b/drivers/gpu/drm/ast/ast_reg.h
@@ -183,6 +183,7 @@
#define AST_REG_SCU(__offset) (AST_REG_SCU_BASE + (__offset))
#define AST_REG_SCU000 AST_REG_SCU(0x000)
#define AST_REG_SCU000_PROTECTION_KEY (0x1688a8a8)
+#define AST_REG_SCU008 AST_REG_SCU(0x008)
#define AST_REG_SCU00C AST_REG_SCU(0x00c)
#define AST_REG_SCU020 AST_REG_SCU(0x020)
#define AST_REG_SCU040 AST_REG_SCU(0x040)
--
2.53.0
next prev parent reply other threads:[~2026-03-23 16:04 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 15:56 [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-23 15:56 ` [PATCH 01/15] drm/ast: dp501: Fix initialization of SCU2C Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 02/15] drm/ast: Move 32-bit register-access helpers to ast_drv.{c, h} Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 03/15] drm/ast: Use constants for AHBC registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 04/15] drm/ast: Use constants for MCR registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 05/15] drm/ast: Use constants for SCU registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 06/15] drm/ast: Use constants for A2P registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 07/15] drm/ast: Use constants for WDT registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 08/15] drm/ast: Use constants for SDRAM registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 09/15] drm/ast: Store register addresses in struct ast_dramstruct Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 10/15] drm/ast: Gen1: Fix open-coded register access Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 11/15] drm/ast: Gen2: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` Thomas Zimmermann [this message]
2026-03-24 21:46 ` Claude review: drm/ast: Gen4: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 13/15] drm/ast: Gen6: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 14/15] drm/ast: dp501: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 15/15] drm/ast: Fix open-coded scu_rev access Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 16:08 ` [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
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