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From: Thomas Zimmermann <tzimmermann@suse.de>
To: jfalempe@redhat.com, airlied@redhat.com,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	airlied@gmail.com, simona@ffwll.ch
Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann <tzimmermann@suse.de>
Subject: [PATCH 08/15] drm/ast: Use constants for SDRAM registers
Date: Mon, 23 Mar 2026 16:56:21 +0100	[thread overview]
Message-ID: <20260323160407.245773-9-tzimmermann@suse.de> (raw)
In-Reply-To: <20260323160407.245773-1-tzimmermann@suse.de>

Aspeed hardware allows for acceessing the SDRAM from the host. SDRAM
registers are located at the memory range at [0x80000000, 0xffffffff].

Refer to memory access with the macro AST_SDRAM(). Also add a TODO item
for the nonsensical documentation next to its caller.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/ast/ast_2500.c | 17 ++++++++++-------
 drivers/gpu/drm/ast/ast_reg.h  |  7 +++++++
 2 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_2500.c b/drivers/gpu/drm/ast/ast_2500.c
index f0639f1ef062..39f401dd1f47 100644
--- a/drivers/gpu/drm/ast/ast_2500.c
+++ b/drivers/gpu/drm/ast/ast_2500.c
@@ -225,6 +225,9 @@ static void ddr_phy_init_2500(struct ast_device *ast)
 }
 
 /*
+ * TODO: Review and fix the comments. The function below only detects
+ *       up to 1 GiB of SDRAM.
+ *
  * Check DRAM Size
  * 1Gb : 0x80000000 ~ 0x87FFFFFF
  * 2Gb : 0x80000000 ~ 0x8FFFFFFF
@@ -238,21 +241,21 @@ static void check_dram_size_2500(struct ast_device *ast, u32 tRFC)
 	reg_04 = ast_mindwm(ast, AST_REG_MCR04) & 0xfffffffc;
 	reg_14 = ast_mindwm(ast, AST_REG_MCR14) & 0xffffff00;
 
-	ast_moutdwm(ast, 0xA0100000, 0x41424344);
-	ast_moutdwm(ast, 0x90100000, 0x35363738);
-	ast_moutdwm(ast, 0x88100000, 0x292A2B2C);
-	ast_moutdwm(ast, 0x80100000, 0x1D1E1F10);
+	ast_moutdwm(ast, AST_SDRAM(0x20100000), 0x41424344);
+	ast_moutdwm(ast, AST_SDRAM(0x10100000), 0x35363738);
+	ast_moutdwm(ast, AST_SDRAM(0x08100000), 0x292A2B2C);
+	ast_moutdwm(ast, AST_SDRAM(0x00100000), 0x1D1E1F10);
 
 	/* Check 8Gbit */
-	if (ast_mindwm(ast, 0xA0100000) == 0x41424344) {
+	if (ast_mindwm(ast, AST_SDRAM(0x20100000)) == 0x41424344) {
 		reg_04 |= 0x03;
 		reg_14 |= (tRFC >> 24) & 0xFF;
 		/* Check 4Gbit */
-	} else if (ast_mindwm(ast, 0x90100000) == 0x35363738) {
+	} else if (ast_mindwm(ast, AST_SDRAM(0x10100000)) == 0x35363738) {
 		reg_04 |= 0x02;
 		reg_14 |= (tRFC >> 16) & 0xFF;
 		/* Check 2Gbit */
-	} else if (ast_mindwm(ast, 0x88100000) == 0x292A2B2C) {
+	} else if (ast_mindwm(ast, AST_SDRAM(0x08100000)) == 0x292A2B2C) {
 		reg_04 |= 0x01;
 		reg_14 |= (tRFC >> 8) & 0xFF;
 	} else {
diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
index 5effe6897b51..78fabe2a9c81 100644
--- a/drivers/gpu/drm/ast/ast_reg.h
+++ b/drivers/gpu/drm/ast/ast_reg.h
@@ -209,4 +209,11 @@
 #define AST_REG_WDT1C(__n)			AST_REG_WDT((__n), 0x1c)
 #define AST_REG_WDT2C(__n)			AST_REG_WDT((__n), 0x2c)
 
+/*
+ * SDRAM (0x80000000 - 0xffffffff)
+ */
+
+#define AST_SDRAM_BASE				(0x80000000)
+#define AST_SDRAM(__offset)			(AST_SDRAM_BASE + (__offset))
+
 #endif
-- 
2.53.0


  parent reply	other threads:[~2026-03-23 16:04 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-23 15:56 [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-23 15:56 ` [PATCH 01/15] drm/ast: dp501: Fix initialization of SCU2C Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 02/15] drm/ast: Move 32-bit register-access helpers to ast_drv.{c, h} Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 03/15] drm/ast: Use constants for AHBC registers Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 04/15] drm/ast: Use constants for MCR registers Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 05/15] drm/ast: Use constants for SCU registers Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 06/15] drm/ast: Use constants for A2P registers Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 07/15] drm/ast: Use constants for WDT registers Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` Thomas Zimmermann [this message]
2026-03-24 21:46   ` Claude review: drm/ast: Use constants for SDRAM registers Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 09/15] drm/ast: Store register addresses in struct ast_dramstruct Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 10/15] drm/ast: Gen1: Fix open-coded register access Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 11/15] drm/ast: Gen2: " Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 12/15] drm/ast: Gen4: " Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 13/15] drm/ast: Gen6: " Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 14/15] drm/ast: dp501: " Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 15/15] drm/ast: Fix open-coded scu_rev access Thomas Zimmermann
2026-03-24 21:46   ` Claude review: " Claude Code Review Bot
2026-03-23 16:08 ` [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot

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