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Sun, 29 Mar 2026 22:30:44 -0700 (PDT) Received: from localhost ([178.214.243.78]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b9b7b1a5fc9sm240417066b.36.2026.03.29.22.30.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Mar 2026 22:30:44 -0700 (PDT) From: Mikhail Gavrilov To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: Eric Huang , David Airlie , Simona Vetter , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, stable@vger.kernel.org, Mikhail Gavrilov Subject: [PATCH v2 2/2] drm/amdgpu: use spin_lock_irqsave for PASID IDR lock Date: Mon, 30 Mar 2026 10:30:25 +0500 Message-ID: <20260330053025.19203-3-mikhail.v.gavrilov@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330053025.19203-1-mikhail.v.gavrilov@gmail.com> References: <20260330053025.19203-1-mikhail.v.gavrilov@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" amdgpu_pasid_free() can be called from hardirq context via the fence signal path: sdma_v6_0_process_trap_irq -> amdgpu_fence_process -> dma_fence_signal -> drm_sched_job_done -> dma_fence_signal -> amdgpu_pasid_free_cb -> amdgpu_pasid_free -> spin_lock(&amdgpu_pasid_idr_lock) <- hardirq context But the lock was originally taken with plain spin_lock() in process context (amdgpu_pasid_alloc), creating an inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} lock state that can deadlock if an interrupt arrives while the lock is held on the same CPU. Use spin_lock_irqsave/spin_unlock_irqrestore for all call sites of amdgpu_pasid_idr_lock to prevent the deadlock. This patch applies on top of "drm/amdgpu: fix sleeping allocation under spinlock in PASID IDR". Fixes: 8f1de51f49be ("drm/amdgpu: prevent immediate PASID reuse case") Cc: stable@vger.kernel.org Signed-off-by: Mikhail Gavrilov --- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c index 515775eab2ef..762ceb3c708a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c @@ -62,16 +62,17 @@ struct amdgpu_pasid_cb { */ int amdgpu_pasid_alloc(unsigned int bits) { + unsigned long flags; int pasid; if (bits == 0) return -EINVAL; idr_preload(GFP_KERNEL); - spin_lock(&amdgpu_pasid_idr_lock); + spin_lock_irqsave(&amdgpu_pasid_idr_lock, flags); pasid = idr_alloc_cyclic(&amdgpu_pasid_idr, NULL, 1, 1U << bits, GFP_NOWAIT); - spin_unlock(&amdgpu_pasid_idr_lock); + spin_unlock_irqrestore(&amdgpu_pasid_idr_lock, flags); idr_preload_end(); if (pasid >= 0) @@ -86,11 +87,12 @@ int amdgpu_pasid_alloc(unsigned int bits) */ void amdgpu_pasid_free(u32 pasid) { + unsigned long flags; trace_amdgpu_pasid_freed(pasid); - spin_lock(&amdgpu_pasid_idr_lock); + spin_lock_irqsave(&amdgpu_pasid_idr_lock, flags); idr_remove(&amdgpu_pasid_idr, pasid); - spin_unlock(&amdgpu_pasid_idr_lock); + spin_unlock_irqrestore(&amdgpu_pasid_idr_lock, flags); } static void amdgpu_pasid_free_cb(struct dma_fence *fence, @@ -633,7 +635,9 @@ void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev) */ void amdgpu_pasid_mgr_cleanup(void) { - spin_lock(&amdgpu_pasid_idr_lock); + unsigned long flags; + + spin_lock_irqsave(&amdgpu_pasid_idr_lock, flags); idr_destroy(&amdgpu_pasid_idr); - spin_unlock(&amdgpu_pasid_idr_lock); + spin_unlock_irqrestore(&amdgpu_pasid_idr_lock, flags); } -- 2.53.0