From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4F85FD5F7A for ; Wed, 8 Apr 2026 05:40:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D81A10E539; Wed, 8 Apr 2026 05:40:50 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="KhVm32w7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 015E810E537; Wed, 8 Apr 2026 05:40:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775626849; x=1807162849; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Fhg5hivoeUn6+5NpnXDGPYDEv88yob/iVZrn59VLgP4=; b=KhVm32w7WEr3VmE8Vn7wG/KYe5AM3026DF52T73j9ai4uENuoWq8jMZX oF1q9O5PkQy0eOon8o61XJRJLbCJ2gLuHDwJb/Z+UA9pyQWc9BRTL/HVy VbnxeRsEB3R5gBZrHHfO0btT+vuaKcWdst5zQUmqdUBAKW9mnNLA7C05X lnpEEv6YNUbl+t3ciK3IoIdBuUr0/LpzRLqrhJw3n3XIrVYTM+edFDnVD UU85M65Om0YvdKyOkqrUCGp+nZsxYJk+b39vWIxK5efmbbapDUx+NBVms gNIPJsAuYK8ukncuWs3w7QPDpfjwZjdxNbAMWJbAuHCyg9W7Mdn/tpZEa g==; X-CSE-ConnectionGUID: 6/Qa4NLRQe2XpHTYiGMhbg== X-CSE-MsgGUID: 5fczz+2URNOHca1HisEwTQ== X-IronPort-AV: E=McAfee;i="6800,10657,11752"; a="80194948" X-IronPort-AV: E=Sophos;i="6.23,167,1770624000"; d="scan'208";a="80194948" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2026 22:40:49 -0700 X-CSE-ConnectionGUID: YX1Xyen8SGyOBONYN3orXg== X-CSE-MsgGUID: U5ONGmOkR4uSPielXv/1VQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,167,1770624000"; d="scan'208";a="251518100" Received: from dut-2a59.iind.intel.com ([10.190.239.113]) by fmviesa002.fm.intel.com with ESMTP; 07 Apr 2026 22:40:44 -0700 From: Chaitanya Kumar Borah To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: harry.wentland@amd.com, louis.chauvet@bootlin.com, mwen@igalia.com, contact@emersion.fr, alex.hung@amd.com, daniels@collabora.com, uma.shankar@intel.com, maarten.lankhorst@intel.com, pekka.paalanen@collabora.com, pranay.samala@intel.com, swati2.sharma@intel.com, chaitanya.kumar.borah@intel.com Subject: [PATCH v2 12/13] drm/i915/color: Program plane YUV range correction colorop Date: Wed, 8 Apr 2026 10:45:13 +0530 Message-Id: <20260408051514.608781-13-chaitanya.kumar.borah@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260408051514.608781-1-chaitanya.kumar.borah@intel.com> References: <20260408051514.608781-1-chaitanya.kumar.borah@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hook up the INTEL_PLANE_CB_YUV_RANGE_CORRECT colorop to plane state and program the corresponding plane color control bits. Track the colorop state in intel_plane_state and enable/disable YUV range correction based on the colorop bypass state. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_plane.c | 3 +++ drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 ++++- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 3347bba598d9..8f942683fc5c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -681,6 +681,7 @@ struct intel_plane_state { struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d; enum drm_colorop_fixed_matrix_type csc_ff_type; /* For SDR plane */ bool csc_ff_enable; + bool yuv_range_correct; } hw; struct i915_vma *ggtt_vma; diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c index 3ef43db8d5d7..0ef06a42f2ac 100644 --- a/drivers/gpu/drm/i915/display/intel_plane.c +++ b/drivers/gpu/drm/i915/display/intel_plane.c @@ -384,6 +384,9 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_plane_state *plane_state, !new_colorop_state->bypass; plane_state->hw.csc_ff_type = new_colorop_state->fixed_matrix_type; + } else if (intel_colorop->id == INTEL_PLANE_CB_YUV_RANGE_CORRECT) { + plane_state->hw.yuv_range_correct = + !new_colorop_state->bypass; } else { blob = new_colorop_state->bypass ? NULL : new_colorop_state->data; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 2234abcd1b03..560093940ae3 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1297,9 +1297,12 @@ static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state) plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE; } - if (!icl_is_hdr_plane(display, plane->id)) + if (!icl_is_hdr_plane(display, plane->id)) { plane_color_ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type, plane_state->hw.csc_ff_enable); + plane_color_ctl |= plane_state->hw.yuv_range_correct ? 0 : + PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE; + } if (plane_state->force_black) plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE; -- 2.25.1