From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A738FD5F6A for ; Wed, 8 Apr 2026 08:58:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2A5210E5CE; Wed, 8 Apr 2026 08:58:19 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="X3O+KH5N"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id 957FA10E5C5; Wed, 8 Apr 2026 08:58:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775638699; x=1807174699; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U0spbKw2aceScPBdUNL0c8eziJlisucWgxzddN5PIEY=; b=X3O+KH5NhriwfcvQcEZrnJ/0j5VgDsjxs7pebL1K0rS8GPuQIfETd4gK nY4xMi3yjn3Cgwg9ncBeGiNgpRpsnXmrFlKt12fyKTUO9DEuX4ZfmamMb YXDsVhJovEWP9iGUl3BFLMxKuOsqeWsZnbHXkQx/TwZD1K+eV5X2Denku st7Q95/WNFQi5bqOITuDVqrunfYPIRfmSB33l7rkiuVy86OziXrUO5JWB BNqrVBq8UIi9ZkBD2BMzVntyPrhgedSXT/xSYTSnVF3u81cPFjI9z+CBx H+D8jvZfVEuClJRtCtaqkc7fduxCzXR//9/mgSCS0GJsnD2V78zh9R1pR g==; X-CSE-ConnectionGUID: 59du//xkS5GK0vAerVbmHg== X-CSE-MsgGUID: 9EmRSyXwRR2uFDIbR1gdxQ== X-IronPort-AV: E=McAfee;i="6800,10657,11752"; a="76516674" X-IronPort-AV: E=Sophos;i="6.23,167,1770624000"; d="scan'208";a="76516674" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2026 01:58:18 -0700 X-CSE-ConnectionGUID: oB3DSDJ7SZOWiyeTBwQc3g== X-CSE-MsgGUID: J2wuo3/kQc+aCo+VXtPIVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,167,1770624000"; d="scan'208";a="227572591" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2026 01:58:16 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, jouni.hogander@intel.com, animesh.manna@intel.com, Ankit Nautiyal Subject: [PATCH 16/26] drm/i915/psr: Add helper to get Async Video timing support in PR active Date: Wed, 8 Apr 2026 14:12:28 +0530 Message-ID: <20260408084239.1295325-17-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260408084239.1295325-1-ankit.k.nautiyal@intel.com> References: <20260408084239.1295325-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Introduce a helper to check if Panel Replay has Async Video Timing support during PR Active state. v2: Confirm that Panel Replay is supported before checking for Async Video Timing Support during PR active. (Ville) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++++ drivers/gpu/drm/i915/display/intel_psr.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index a927b73c3f6e..257bfaed2e10 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -4652,3 +4652,14 @@ bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state) return HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display) && crtc_state->has_psr; } + +bool intel_psr_pr_async_video_timing_supported(struct intel_dp *intel_dp) +{ + struct intel_connector *connector = intel_dp->attached_connector; + u8 *dpcd = connector->dp.panel_replay_caps.dpcd; + u8 pr_support = dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)]; + u8 pr_cap = dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_CAPABILITY)]; + + return (pr_support & DP_PANEL_REPLAY_SUPPORT) && + !(pr_cap & DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR); +} diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 394b641840b3..29723e63888f 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -86,5 +86,6 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); int intel_psr_min_guardband(struct intel_crtc_state *crtc_state); bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state); +bool intel_psr_pr_async_video_timing_supported(struct intel_dp *intel_dp); #endif /* __INTEL_PSR_H__ */ -- 2.45.2