Claude review: drm/panthor: Use a local iomem base for GPU registers

Claude Code Review Bot
2026-04-11T23:38:16Z

Patch Review

The `GPU_CONTROL_BASE` is defined as `0x0`, which is technically correct (GPU registers do start at offset 0) but `gpu->iomem = ptdev->iomem + GPU_CONTROL_BASE` is equivalent to `gpu->iomem = ptdev->iomem`. This adds a level of indirection without actually changing the base pointer. It's fine as documentation/consistency but is somewhat unusual.

The conversion of `panthor_gpu_irq_handler` to use `gpu->irq.iomem` for `INT_CLEAR` and `gpu->iomem` for fault/status registers is correct. The `panthor_gpu_flush_caches` and `panthor_gpu_soft_reset` correctly use `gpu->irq.iomem` for `INT_RAWSTAT` and `INT_CLEAR` reads.

The removal of the absolute `GPU_INT_RAWSTAT`/`GPU_INT_CLEAR`/etc. defines from `panthor_gpu_regs.h` is correct since all accesses now go through the generic `INT_*` offsets via `pirq->iomem`.

No issues in this patch.

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Generated by Claude Code Patch Reviewer