From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CDCBF5A8C9 for ; Mon, 20 Apr 2026 22:27:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5D74C10E782; Mon, 20 Apr 2026 22:27:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.b="b3jwNKRQ"; dkim=pass (2048-bit key; unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="LyLA9eOs"; dkim-atps=neutral Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0386E10E77C for ; Mon, 20 Apr 2026 22:27:15 +0000 (UTC) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63KFp4dE084489 for ; Mon, 20 Apr 2026 22:27:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=73a7GDxAtmo eVjOlgWBJJe3wNVofmUGElsbk/4jKqf0=; b=b3jwNKRQRckVDuwJ73dnwzE8ZtG iENXOvezxkWD9NQIf0JPEdkiRfBoqf0ZI4pW47yqIOYOeQTfV00Zk/NQqIlKHlbN Nut9jjdP+2XSybxzmJbL5D+fy64h0WVtETTtoLk4YHcx6pQGfUwwLK71dCNwacWd Q8MjMd5TfSlYKzFaf1FI+GsVfILjRD/odbLcl4feczuOy+xnuhUxYWxpTIuIYHbY dLcz8x5/j5dAYnuLuIRtg/vE0Z0XkTsGTiGcqC3hia6rzr7OByFQh0m02WHAdxba WZpivXMAEtXWEu4CRu4iuQ4xY7Rb2tdiWyERfWyu4GDUSEsFj5R+K11Z/Vg== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dnh81jsej-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 20 Apr 2026 22:27:14 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-35da1c703d1so4016780a91.1 for ; Mon, 20 Apr 2026 15:27:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1776724034; x=1777328834; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=73a7GDxAtmoeVjOlgWBJJe3wNVofmUGElsbk/4jKqf0=; b=LyLA9eOsQl7SkPFqAwfsN+DKYUTRF542Ow875K1jS2eNjnN/8plDrSv9ucEhkjE2Lc r3HRJtYfiRzpvEd8tIPZVpRUEUbBE/VQDQxoA6z6vl7hzGvGWlaRflEifh5N3tHEcdrg z6AvuAvNZvBoMSCeGMDcoUzRzvyv11vjro6RreH8oKIRvWaH4KkHNAVsgFcHmDdToafA mP6lzIeR1d1qiF/BET4crk6741FH3fgnLzH2ewFlNnQQFww78wXwk1chT64bSA1cxf/I GQzdyqn5cZmLC0pdCFafRpA6uOURn8TUmojFfHvB2n5R8QBWV4gy0p7C6MC0QeUL0Tnz ZA3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776724034; x=1777328834; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=73a7GDxAtmoeVjOlgWBJJe3wNVofmUGElsbk/4jKqf0=; b=k2i26vVi2M7p13SUpg3P05N2CMbP2QyXvC2BpdrJvU1Xu1ROdUfy0Dam5uU9K+G/PT Dnj/5lymMYjFzYi+WDzet5AqtCx6rPWXt+UmUM0x5+FH3jJQMkjqRcVY/7GTyeIXVzMc HXBnkTpfNjmhVW69RVkPo30WiMGwONHbzIn8Jy5K4X1U2sCC6M9kJBk/sZyQE094QVuH WIPjTJ4Cqx4zduvtBZw73qk2HqRDjGljtIWKmTqWZxFjVRT3b3/baFk8XecpQTIejZT1 UnGC6gIZY9tXGN9nRNbGezJR3vSig8NGPYeoWxEEpF5wxlQg5l7w5gI7NAzTNze2qs6U lMSQ== X-Gm-Message-State: AOJu0YxwGNvK5qkWLVx3HpLv8TednrdLK54MOgilNUG1A8RSzC8j3TGl 2kVQjBrVT9hGx6ccMP6eo6WPCshO5/fVFQDTkWvDSl/zo/iaWp2scxExc96rYvuzwXRAOiIu/us W5MUPbvsZ3/7sZLtwavOPU8BVUdOZu/1glwHQWjF7/t+/T0O4uZ1XZlmudv3kEZpsQzj//Qq3X/ PGovg= X-Gm-Gg: AeBDiesAX36+pBLFathjF4n847/wNIF0L7IlarTksuFGpNPPEk61fCuiLTvOOXnkMAb xit6o/meu+zAWxRWeMT11WoJTD9s7IlOddq3FNKta+4YQtXOB9lTIR7ro5gkDcWNg8oyizUQ/Ta IYSS+ktvfP5pc9Q2uIuR61V2tdKR9jzyluQ3nnvivRxYznYUwiOuf4SgW7bbpzQHaGfnDstdWwN DPfzkMqBR2jSSl1JD/pAnVE+kFycODZysL3jol+EeK6bjrRoCB2UucqNSqn1N6z8y2VUKAw5+1c rpxvbngu5AGjQ6g8M5S6/SKxKWmyaztBmT93wy83aqNogpEfNmiOqU1Shg9UWvEe4kOsANLLdWC NzwE+fN1Up562bzyJayVkR6U3Oawmia7YUfYBmuOZzbk= X-Received: by 2002:a05:6a20:244e:b0:398:f1ed:7fa0 with SMTP id adf61e73a8af0-3a08d933fe4mr15374511637.55.1776724033468; Mon, 20 Apr 2026 15:27:13 -0700 (PDT) X-Received: by 2002:a05:6a20:244e:b0:398:f1ed:7fa0 with SMTP id adf61e73a8af0-3a08d933fe4mr15374478637.55.1776724032884; Mon, 20 Apr 2026 15:27:12 -0700 (PDT) Received: from localhost ([2601:1c0:5000:d5c:4ec8:83f5:8254:6891]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7976f920e1sm8693062a12.2.2026.04.20.15.27.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2026 15:27:12 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Akhil P Oommen , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Konrad Dybcio , linux-kernel@vger.kernel.org (open list) Subject: [PATCH 04/13] drm/msm/registers: Add perfcntr json Date: Mon, 20 Apr 2026 15:25:26 -0700 Message-ID: <20260420222621.417276-5-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260420222621.417276-1-robin.clark@oss.qualcomm.com> References: <20260420222621.417276-1-robin.clark@oss.qualcomm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIwMDIyMCBTYWx0ZWRfX+6EwdSjPelZG C2DvkAko6lnkLAhp88NbPRlH32C0byafraUgdxzG38HMHIfBMA+CF7h2mr+TjkuZ/p9LgJUe6o0 plLb1n7GZmoLMYz49C2tRWlZvaEcv24hws2Jj8SDoP0I4L8OPBIyl7CN9JofK/TV3zuY9UhnWrc 4zpLAYpg8SvkFO401wtj9goH7hoENET/2+JKEuFJFepVyRFL4FFrKEBjJvyR0Yu7ebb1/X+p/jA XIih4T78/hZ1M300INnIoznUoWqxuEVS8XI7E5JYwdnEOWSh7/zPiYWx5Ov6yVoT0mvbCMDuoYO hD5l68GrIZBdnmcHxdJA7IJ9dvOeusQX+DbZKvRZjhNYOIA2KL3xRLcREy19wi5fxRrrJXMvYZg FPG9PeN4S76vTcppZAKbVyC+6JfUfHrPfNjjJTHFYznuJLBVGigdSHt4WKat3scljdBKxXzaNXb eoy3DvBb3/+30M91FPg== X-Proofpoint-GUID: MobbhlXJH5mvEpghUqhB2TjbdNcjhSI5 X-Proofpoint-ORIG-GUID: MobbhlXJH5mvEpghUqhB2TjbdNcjhSI5 X-Authority-Analysis: v=2.4 cv=PsKjqQM3 c=1 sm=1 tr=0 ts=69e6a842 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=xqWC_Br6kY4A:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=e5mUnYsNAAAA:8 a=EUspDBNiAAAA:8 a=M8oLgKS-H7hDzfawthsA:9 a=-Dwq1J-KyWTV094w:21 a=mQ_c8vxmzFEMiUWkPHU9:22 a=Vxmtnl_E_bksehYqCbjh:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-20_04,2026-04-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604200220 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Pull in perfcntr json and wire up generation of perfcntr tables. Sync from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40522 Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/Makefile | 17 ++ .../msm/registers/adreno/a6xx_perfcntrs.json | 105 ++++++++ .../msm/registers/adreno/a7xx_perfcntrs.json | 228 +++++++++++++++++ .../msm/registers/adreno/a8xx_perfcntrs.json | 240 ++++++++++++++++++ 4 files changed, 590 insertions(+) create mode 100644 drivers/gpu/drm/msm/registers/adreno/a6xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.json create mode 100644 drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.json diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index ce00cfb0a875..55388544de9f 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -176,6 +176,11 @@ quiet_cmd_headergen = GENHDR $@ cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(src)/registers/gen_header.py \ $(headergen-opts) --rnn $(src)/registers --xml $< c-defines > $@ +# TODO how to do this for a2xx/a5xx which have different .xml arg? +quiet_cmd_headergen_json = GENHDRJSN $@ + cmd_headergen_json = mkdir -p $(obj)/generated && $(PYTHON3) $(src)/registers/gen_header.py \ + $(headergen-opts) --rnn $(src)/registers --xml $(src)/registers/adreno/a6xx.xml perfcntrs --json $< > $@ + $(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \ $(src)/registers/adreno/adreno_common.xml \ $(src)/registers/adreno/adreno_pm4.xml \ @@ -192,6 +197,18 @@ $(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \ FORCE $(call if_changed,headergen) +$(obj)/generated/%.json.c: $(src)/registers/adreno/%.json \ + $(src)/registers/adreno/a6xx_perfcntrs.json \ + $(src)/registers/adreno/a7xx_perfcntrs.json \ + $(src)/registers/adreno/a8xx_perfcntrs.json \ + FORCE + $(call if_changed,headergen_json) + +adreno-y += \ + generated/a6xx_perfcntrs.json.o \ + generated/a7xx_perfcntrs.json.o \ + generated/a8xx_perfcntrs.json.o \ + ADRENO_HEADERS = \ generated/a2xx.xml.h \ generated/a3xx.xml.h \ diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_perfcntrs.json b/drivers/gpu/drm/msm/registers/adreno/a6xx_perfcntrs.json new file mode 100644 index 000000000000..8bb31820479e --- /dev/null +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_perfcntrs.json @@ -0,0 +1,105 @@ +{ + "chip": "A6XX", + "groups": [ + { + "name": "CP", + "num": 14, + "reserved": [ 0 ], + "select": "CP_PERFCTR_CP_SEL", + "counter": "RBBM_PERFCTR_CP", + "countable_type": "a6xx_cp_perfcounter_select" + }, + { + "name": "CCU", + "num": 5, + "select": "RB_PERFCTR_CCU_SEL", + "counter": "RBBM_PERFCTR_CCU", + "countable_type": "a6xx_ccu_perfcounter_select" + }, + { + "name": "TSE", + "num": 4, + "select": "GRAS_PERFCTR_TSE_SEL", + "counter": "RBBM_PERFCTR_TSE", + "countable_type": "a6xx_tse_perfcounter_select" + }, + { + "name": "RAS", + "num": 4, + "select": "GRAS_PERFCTR_RAS_SEL", + "counter": "RBBM_PERFCTR_RAS", + "countable_type": "a6xx_ras_perfcounter_select" + }, + { + "name": "LRZ", + "num": 4, + "select": "GRAS_PERFCTR_LRZ_SEL", + "counter": "RBBM_PERFCTR_LRZ", + "countable_type": "a6xx_lrz_perfcounter_select" + }, + { + "name": "HLSQ", + "num": 6, + "select": "HLSQ_PERFCTR_HLSQ_SEL", + "counter": "RBBM_PERFCTR_HLSQ", + "countable_type": "a6xx_hlsq_perfcounter_select" + }, + { + "name": "PC", + "num": 8, + "select": "PC_PERFCTR_PC_SEL", + "counter": "RBBM_PERFCTR_PC", + "countable_type": "a6xx_pc_perfcounter_select" + }, + { + "name": "RB", + "num": 8, + "select": "RB_PERFCTR_RB_SEL", + "counter": "RBBM_PERFCTR_RB", + "countable_type": "a6xx_rb_perfcounter_select" + }, + { + "name": "SP", + "num": 24, + "reserved": [ 0 ], + "select": "SP_PERFCTR_SP_SEL", + "counter": "RBBM_PERFCTR_SP", + "countable_type": "a6xx_sp_perfcounter_select" + }, + { + "name": "TP", + "num": 12, + "select": "TPL1_PERFCTR_TP_SEL", + "counter": "RBBM_PERFCTR_TP", + "countable_type": "a6xx_tp_perfcounter_select" + }, + { + "name": "UCHE", + "num": 12, + "select": "UCHE_PERFCTR_UCHE_SEL", + "counter": "RBBM_PERFCTR_UCHE", + "countable_type": "a6xx_uche_perfcounter_select" + }, + { + "name": "VFD", + "num": 8, + "select": "VFD_PERFCTR_VFD_SEL", + "counter": "RBBM_PERFCTR_VFD", + "countable_type": "a6xx_vfd_perfcounter_select" + }, + { + "name": "VPC", + "num": 6, + "select": "VPC_PERFCTR_VPC_SEL", + "counter": "RBBM_PERFCTR_VPC", + "countable_type": "a6xx_vpc_perfcounter_select" + }, + { + "name": "VSC", + "num": 2, + "select": "VSC_PERFCTR_VSC_SEL", + "counter": "RBBM_PERFCTR_VSC", + "countable_type": "a6xx_vsc_perfcounter_select" + } + ] +} diff --git a/drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.json b/drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.json new file mode 100644 index 000000000000..e60aab1862ec --- /dev/null +++ b/drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.json @@ -0,0 +1,228 @@ +{ + "chip": "A7XX", + "groups": [ + { + "name": "CP", + "num": 14, + "reserved": [ 0 ], + "select": "CP_PERFCTR_CP_SEL", + "counter": "RBBM_PERFCTR_CP", + "countable_type": "a7xx_cp_perfcounter_select" + }, + { + "name": "RBBM", + "num": 4, + "select": "RBBM_PERFCTR_RBBM_SEL", + "counter": "RBBM_PERFCTR_RBBM", + "countable_type": "a7xx_rbbm_perfcounter_select" + }, + { + "name": "PC", + "pipe": "BR", + "num": 8, + "select": "PC_PERFCTR_PC_SEL", + "counter": "RBBM_PERFCTR_PC", + "countable_type": "a7xx_pc_perfcounter_select" + }, + { + "name": "VFD", + "pipe": "BR", + "num": 8, + "select": "VFD_PERFCTR_VFD_SEL", + "counter": "RBBM_PERFCTR_VFD", + "countable_type": "a7xx_vfd_perfcounter_select" + }, + { + "name": "HLSQ", + "pipe": "BR", + "num": 6, + "select": "SP_PERFCTR_HLSQ_SEL", + "counter": "RBBM_PERFCTR_HLSQ", + "countable_type": "a7xx_hlsq_perfcounter_select" + }, + { + "name": "VPC", + "pipe": "BR", + "num": 6, + "select": "VPC_PERFCTR_VPC_SEL", + "counter": "RBBM_PERFCTR_VPC", + "countable_type": "a7xx_vpc_perfcounter_select" + }, + { + "name": "TSE", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_TSE_SEL", + "counter": "RBBM_PERFCTR_TSE", + "countable_type": "a7xx_tse_perfcounter_select" + }, + { + "name": "RAS", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_RAS_SEL", + "counter": "RBBM_PERFCTR_RAS", + "countable_type": "a7xx_ras_perfcounter_select" + }, + { + "name": "UCHE", + "num": 12, + "select": "UCHE_PERFCTR_UCHE_SEL", + "counter": "RBBM_PERFCTR_UCHE", + "countable_type": "a7xx_uche_perfcounter_select" + }, + { + "name": "TP", + "pipe": "BR", + "num": 12, + "select": "TPL1_PERFCTR_TP_SEL", + "counter": "RBBM_PERFCTR_TP", + "countable_type": "a7xx_tp_perfcounter_select" + }, + { + "name": "SP", + "pipe": "BR", + "num": 24, + "select": "SP_PERFCTR_SP_SEL", + "counter": "RBBM_PERFCTR_SP", + "countable_type": "a7xx_sp_perfcounter_select" + }, + { + "name": "RB", + "num": 8, + "select": "RB_PERFCTR_RB_SEL", + "counter": "RBBM_PERFCTR_RB", + "countable_type": "a7xx_rb_perfcounter_select" + }, + { + "name": "VSC", + "num": 2, + "select": "VSC_PERFCTR_VSC_SEL", + "counter": "RBBM_PERFCTR_VSC", + "countable_type": "a7xx_vsc_perfcounter_select" + }, + { + "name": "CCU", + "num": 5, + "select": "RB_PERFCTR_CCU_SEL", + "counter": "RBBM_PERFCTR_CCU", + "countable_type": "a7xx_ccu_perfcounter_select" + }, + { + "name": "LRZ", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_LRZ_SEL", + "counter": "RBBM_PERFCTR_LRZ", + "countable_type": "a7xx_lrz_perfcounter_select" + }, + { + "name": "CMP", + "num": 4, + "select": "RB_PERFCTR_CMP_SEL", + "counter": "RBBM_PERFCTR_CMP", + "countable_type": "a7xx_cmp_perfcounter_select" + }, + { + "name": "UFC", + "pipe": "BR", + "num": 4, + "select": "RB_PERFCTR_UFC_SEL", + "counter": "RBBM_PERFCTR_UFC", + "countable_type": "a7xx_ufc_perfcounter_select" + }, + { + "name": "BV_CP", + "num": 7, + "select": "CP_BV_PERFCTR_CP_SEL", + "counter": "RBBM_PERFCTR2_CP", + "countable_type": "a7xx_cp_perfcounter_select" + }, + { + "name": "BV_PC", + "pipe": "BV", + "num": 8, + "select_offset": 8, + "select": "PC_PERFCTR_PC_SEL", + "counter": "RBBM_PERFCTR_BV_PC", + "countable_type": "a7xx_pc_perfcounter_select" + }, + { + "name": "BV_VFD", + "pipe": "BV", + "num": 8, + "select_offset": 8, + "select": "VFD_PERFCTR_VFD_SEL", + "counter": "RBBM_PERFCTR_BV_VFD", + "countable_type": "a7xx_vfd_perfcounter_select" + }, + { + "name": "BV_VPC", + "pipe": "BV", + "num": 6, + "select_offset": 6, + "select": "VPC_PERFCTR_VPC_SEL", + "counter": "RBBM_PERFCTR_BV_VPC", + "countable_type": "a7xx_vpc_perfcounter_select" + }, + { + "name": "BV_TP", + "pipe": "BV", + "num": 6, + "select_offset": 12, + "select": "TPL1_PERFCTR_TP_SEL", + "counter": "RBBM_PERFCTR2_TP", + "countable_type": "a7xx_tp_perfcounter_select" + }, + { + "name": "BV_SP", + "pipe": "BV", + "num": 12, + "select_offset": 24, + "select": "SP_PERFCTR_SP_SEL", + "counter": "RBBM_PERFCTR2_SP", + "countable_type": "a7xx_sp_perfcounter_select" + }, + { + "name": "BV_UFC", + "pipe": "BV", + "num": 2, + "select_offset": 4, + "select": "RB_PERFCTR_UFC_SEL", + "counter": "RBBM_PERFCTR2_UFC", + "countable_type": "a7xx_ufc_perfcounter_select" + }, + { + "name": "BV_TSE", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_TSE_SEL", + "counter": "RBBM_PERFCTR_BV_TSE", + "countable_type": "a7xx_tse_perfcounter_select" + }, + { + "name": "BV_RAS", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_RAS_SEL", + "counter": "RBBM_PERFCTR_BV_RAS", + "countable_type": "a7xx_ras_perfcounter_select" + }, + { + "name": "BV_LRZ", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_LRZ_SEL", + "counter": "RBBM_PERFCTR_BV_LRZ", + "countable_type": "a7xx_lrz_perfcounter_select" + }, + { + "name": "BV_HLSQ", + "pipe": "BV", + "num": 6, + "select": "SP_PERFCTR_HLSQ_SEL", + "counter": "RBBM_PERFCTR2_HLSQ", + "countable_type": "a7xx_hlsq_perfcounter_select" + } + ] +} diff --git a/drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.json b/drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.json new file mode 100644 index 000000000000..503b113df397 --- /dev/null +++ b/drivers/gpu/drm/msm/registers/adreno/a8xx_perfcntrs.json @@ -0,0 +1,240 @@ +{ + "chip": "A8XX", + "groups": [ + { + "name": "CP", + "num": 14, + "reserved": [ 0 ], + "select": "CP_PERFCTR_CP_SEL", + "counter": "RBBM_PERFCTR_CP", + "countable_type": "a8xx_cp_perfcounter_select" + }, + { + "name": "RBBM", + "num": 4, + "select": "RBBM_PERFCTR_RBBM_SEL", + "slice_select": [ "RBBM_SLICE_PERFCTR_RBBM_SEL" ], + "counter": "RBBM_PERFCTR_RBBM", + "countable_type": "a8xx_rbbm_perfcounter_select" + }, + { + "name": "PC", + "pipe": "BR", + "num": 8, + "select": "PC_PERFCTR_PC_SEL", + "slice_select": [ "PC_SLICE_PERFCTR_PC_SEL" ], + "counter": "RBBM_PERFCTR_PC", + "countable_type": "a8xx_pc_perfcounter_select" + }, + { + "name": "VFD", + "pipe": "BR", + "num": 8, + "select": "VFD_PERFCTR_VFD_SEL", + "counter": "RBBM_PERFCTR_VFD", + "countable_type": "a8xx_vfd_perfcounter_select" + }, + { + "name": "HLSQ", + "pipe": "BR", + "num": 6, + "select": "SP_PERFCTR_HLSQ_SEL", + "slice_select": [ "SP_PERFCTR_HLSQ_SEL_2" ], + "counter": "RBBM_PERFCTR_HLSQ", + "countable_type": "a8xx_hlsq_perfcounter_select" + }, + { + "name": "VPC", + "pipe": "BR", + "num": 6, + "select": "VPC_PERFCTR_VPC_SEL", + "slice_select": [ "VPC_PERFCTR_VPC_SEL_1", "VPC_PERFCTR_VPC_SEL_2" ], + "counter": "RBBM_PERFCTR_VPC", + "countable_type": "a8xx_vpc_perfcounter_select" + }, + { + "name": "TSE", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_TSE_SEL", + "slice_select": [ "GRAS_PERFCTR_TSEFE_SEL" ], + "counter": "RBBM_PERFCTR_TSE", + "countable_type": "a8xx_tse_perfcounter_select" + }, + { + "name": "RAS", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_RAS_SEL", + "counter": "RBBM_PERFCTR_RAS", + "countable_type": "a8xx_ras_perfcounter_select" + }, + { + "name": "UCHE", + "num": 12, + "select": "UCHE_PERFCTR_UCHE_SEL", + "counter": "RBBM_PERFCTR_UCHE", + "countable_type": "a8xx_uche_perfcounter_select" + }, + { + "name": "TP", + "pipe": "BR", + "num": 12, + "select": "TPL1_PERFCTR_TP_SEL", + "counter": "RBBM_PERFCTR_TP", + "countable_type": "a8xx_tp_perfcounter_select" + }, + { + "name": "SP", + "pipe": "BR", + "num": 24, + "select": "SP_PERFCTR_SP_SEL", + "counter": "RBBM_PERFCTR_SP", + "countable_type": "a8xx_sp_perfcounter_select" + }, + { + "name": "RB", + "pipe": "BR", + "num": 8, + "select": "RB_PERFCTR_RB_SEL", + "counter": "RBBM_PERFCTR_RB", + "countable_type": "a8xx_rb_perfcounter_select" + }, + { + "name": "VSC", + "num": 2, + "select": "VSC_PERFCTR_VSC_SEL", + "counter": "RBBM_PERFCTR_VSC", + "countable_type": "a8xx_vsc_perfcounter_select" + }, + { + "name": "CCU", + "pipe": "BR", + "num": 5, + "select": "RB_PERFCTR_CCU_SEL", + "counter": "RBBM_PERFCTR_CCU", + "countable_type": "a8xx_ccu_perfcounter_select" + }, + { + "name": "LRZ", + "pipe": "BR", + "num": 4, + "select": "GRAS_PERFCTR_LRZ_SEL", + "counter": "RBBM_PERFCTR_LRZ", + "countable_type": "a8xx_lrz_perfcounter_select" + }, + { + "name": "CMP", + "num": 4, + "select": "RB_PERFCTR_CMP_SEL", + "counter": "RBBM_PERFCTR_CMP", + "countable_type": "a8xx_cmp_perfcounter_select" + }, + { + "name": "UFC", + "pipe": "BR", + "num": 4, + "select": "RB_PERFCTR_UFC_SEL", + "counter": "RBBM_PERFCTR_UFC", + "countable_type": "a8xx_ufc_perfcounter_select" + }, + { + "name": "BV_CP", + "num": 7, + "select_offset": 14, + "select": "CP_PERFCTR_CP_SEL", + "counter": "RBBM_PERFCTR2_CP", + "countable_type": "a8xx_cp_perfcounter_select" + }, + { + "name": "BV_PC", + "pipe": "BV", + "num": 8, + "select_offset": 8, + "select": "PC_PERFCTR_PC_SEL", + "slice_select": [ "PC_SLICE_PERFCTR_PC_SEL" ], + "counter": "RBBM_PERFCTR_BV_PC", + "countable_type": "a8xx_pc_perfcounter_select" + }, + { + "name": "BV_VFD", + "pipe": "BV", + "num": 8, + "select_offset": 8, + "select": "VFD_PERFCTR_VFD_SEL", + "counter": "RBBM_PERFCTR_BV_VFD", + "countable_type": "a8xx_vfd_perfcounter_select" + }, + { + "name": "BV_VPC", + "pipe": "BV", + "num": 6, + "select_offset": 6, + "select": "VPC_PERFCTR_VPC_SEL", + "slice_select": [ "VPC_PERFCTR_VPC_SEL_1", "VPC_PERFCTR_VPC_SEL_2" ], + "counter": "RBBM_PERFCTR_BV_VPC", + "countable_type": "a8xx_vpc_perfcounter_select" + }, + { + "name": "BV_TP", + "pipe": "BV", + "num": 8, + "select_offset": 12, + "select": "TPL1_PERFCTR_TP_SEL", + "counter": "RBBM_PERFCTR2_TP", + "countable_type": "a8xx_tp_perfcounter_select" + }, + { + "name": "BV_SP", + "pipe": "BV", + "num": 12, + "select_offset": 24, + "select": "SP_PERFCTR_SP_SEL", + "counter": "RBBM_PERFCTR2_SP", + "countable_type": "a8xx_sp_perfcounter_select" + }, + { + "name": "BV_UFC", + "pipe": "BV", + "num": 2, + "select_offset": 4, + "select": "RB_PERFCTR_UFC_SEL", + "counter": "RBBM_PERFCTR2_UFC", + "countable_type": "a8xx_ufc_perfcounter_select" + }, + { + "name": "BV_TSE", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_TSE_SEL", + "slice_select": [ "GRAS_PERFCTR_TSEFE_SEL" ], + "counter": "RBBM_PERFCTR_BV_TSE", + "countable_type": "a8xx_tse_perfcounter_select" + }, + { + "name": "BV_RAS", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_RAS_SEL", + "counter": "RBBM_PERFCTR_BV_RAS", + "countable_type": "a8xx_ras_perfcounter_select" + }, + { + "name": "BV_LRZ", + "pipe": "BV", + "num": 4, + "select": "GRAS_PERFCTR_LRZ_SEL", + "counter": "RBBM_PERFCTR_BV_LRZ", + "countable_type": "a8xx_lrz_perfcounter_select" + }, + { + "name": "BV_HLSQ", + "pipe": "BV", + "num": 6, + "select": "SP_PERFCTR_HLSQ_SEL", + "slice_select": [ "SP_PERFCTR_HLSQ_SEL_2" ], + "counter": "RBBM_PERFCTR2_HLSQ", + "countable_type": "a8xx_hlsq_perfcounter_select" + } + ] +} -- 2.53.0