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[207.179.239.100]) by smtp-relay.gmail.com with ESMTPS id 006d021491bc7-6966baf952asm41557eaf.9.2026.04.28.21.15.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2026 21:15:38 -0700 (PDT) X-Relaying-Domain: ausil.us From: Dennis Gilmore To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Alexey Charkov , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Peter Robinson , Jonas Karlman , Jernej Skrabec , Laurent Pinchart , Dennis Gilmore Subject: [PATCH 3/3] arm64: dts: rockchip: orangepi-5-pro: Add LT8711UXD DP-to-HDMI bridge Date: Tue, 28 Apr 2026 23:15:28 -0500 Message-ID: <20260429041528.558254-4-dennis@ausil.us> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260429041528.558254-1-dennis@ausil.us> References: <20260429041528.558254-1-dennis@ausil.us> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Wire up the second HDMI port on the Orange Pi 5 Pro. It uses a Lontium LT8711UXD high performance two lane Type-C/DP1.4 to HDMI2.0 converter, designed to connect a USB Type-C source or a DP1.4 source to an HDMI2.0 sink. The bridge can be controlled via i2c or run as an autonomous device. The Orange Pi 5 Pro has i2c wired up to i2c6, however there are 10k resistors left off of R9 and R17 to enable MODE_SEL, and R27 for I2C_ADDR resulting in MODE_SEL going to GND and the bridge let in autonomous mode. As shipped I verified that the bridge does not show up on the i2c bus. Signed-off-by: Dennis Gilmore --- .../dts/rockchip/rk3588s-orangepi-5-pro.dts | 88 ++++++++++++++++++- 1 file changed, 85 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts index 895d954a9f23..67363709c4ca 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts @@ -14,6 +14,44 @@ aliases { mmc2 = &sdio; }; + hdmi1-con { + compatible = "hdmi-connector"; + label = "HDMI1 OUT"; + type = "a"; + + port { + hdmi1_con_in: endpoint { + remote-endpoint = <<8711uxd_out>; + }; + }; + }; + + hdmi-bridge { + compatible = "lontium,lt8711uxd"; + vdd-supply = <&vcc3v3_dp>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt8711uxd_in: endpoint { + remote-endpoint = <&dp0_out_con>; + }; + }; + + port@1 { + reg = <1>; + + lt8711uxd_out: endpoint { + remote-endpoint = <&hdmi1_con_in>; + }; + }; + }; + }; + analog-sound { compatible = "simple-audio-card"; pinctrl-names = "default"; @@ -72,6 +110,19 @@ fan: pwm-fan { pwms = <&pwm2 0 20000000 0>; }; + vcc3v3_dp: regulator-vcc3v3-dp { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dp_bridge_en>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc3v3_dp"; + regulator-always-on; + vin-supply = <&vcc_3v3_s3>; + }; + vcc3v3_eth: regulator-vcc3v3-eth { compatible = "regulator-fixed"; enable-active-high; @@ -116,6 +167,24 @@ typea_con: usb-a-connector { }; }; +&dp0 { + pinctrl-names = "default"; + pinctrl-0 = <&dp0m0_pins>; + status = "okay"; +}; + +&dp0_in { + dp0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <<8711uxd_in>; + }; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1m4_xfer>; @@ -217,6 +286,12 @@ bt_wake_host_irq: bt-wake-host-irq { }; }; + dp { + dp_bridge_en: dp-bridge-en { + rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + ethernet { ethernet_en: ethernet-en { rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; @@ -350,9 +425,16 @@ &usb_host0_xhci { &usbdp_phy0 { /* - * The USB3 Type-A host connector is wired to PHY lanes 2/3. Lanes 0/1 - * are connected to the LT8711UXD DP-to-HDMI bridge on the board. - * dp-lane-mux routes USB3 SuperSpeed to the correct lanes. + * USBDP PHY0 is wired to a USB3 Type-A host connector via lanes 2/3. + * Additionally lanes 0/1 and the aux channel are wired to the + * Lontium LT8711UXD DP-to-HDMI bridge feeding the HDMI1 connector. */ rockchip,dp-lane-mux = <0 1>; }; + +&vp1 { + vp1_out_dp0: endpoint@a { + reg = ; + remote-endpoint = <&dp0_in_vp1>; + }; +}; -- 2.54.0