From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD067CD4855 for ; Tue, 12 May 2026 09:57:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2224A10E152; Tue, 12 May 2026 09:57:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=rock-chips.com header.i=@rock-chips.com header.b="Rahfz+fN"; dkim-atps=neutral Received: from mail-m49244.qiye.163.com (mail-m49244.qiye.163.com [45.254.49.244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7083010E152 for ; Tue, 12 May 2026 09:57:01 +0000 (UTC) Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 3e1830318; Tue, 12 May 2026 17:56:57 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v4 05/10] drm/rockchip: analogix_dp: Enable hclk for RK3588 Date: Tue, 12 May 2026 17:56:39 +0800 Message-Id: <20260512095644.1946084-6-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512095644.1946084-1-damon.ding@rock-chips.com> References: <20260512095644.1946084-1-damon.ding@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Tid: 0a9e1b9e44b503a3kunm05d2ddd6129055 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkZGEJMVk4fS0NKGRhNS01CT1YVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=Rahfz+fNmeM9zAzV0k9qUdKa9GZbWBFfxRc2rFhA5KFi9lJ4R4EI+eTS+pAsvzV9994oDDuA4IeTXpIHBKr4NHMgSCHu//onJnPth6/tQbJZqebzFkzmyl0YKedqzQSRVznPZmWUAuf+wcLAm53kWJxVh8ocoyIX1TDp1lH7uaI=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=iRGQfU4eadMI5PBD8HiTf+veqx3D693YM3/Jh7hnB60=; h=date:mime-version:subject:message-id:from; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Acquire and enable the HCLK_VO1 bus clock explicitly for RK3588 eDP controller to guarantee register and datapath access. The clock was previously enabled implicitly via rockchip,vo-grf phandle reference, which relies on side effect and is fragile. Fetch optional "hclk" clock in driver to align with updated device tree binding and keep consistent with hardware clock dependency. Fixes: 729f8eefdcad ("drm/rockchip: analogix_dp: Add support for RK3588") Signed-off-by: Damon Ding --- Changes in v4: - Modify the commit msg. --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 41ff44eaf44d..a864bcf8200e 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -311,6 +311,7 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) { struct device *dev = dp->dev; struct device_node *np = dev->of_node; + struct clk *clk; dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); if (IS_ERR(dp->grf)) @@ -327,6 +328,11 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) return dev_err_probe(dev, PTR_ERR(dp->pclk), "failed to get pclk property\n"); + clk = devm_clk_get_optional_enabled(dev, "hclk"); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), + "failed to get hclk property\n"); + dp->rst = devm_reset_control_get(dev, "dp"); if (IS_ERR(dp->rst)) return dev_err_probe(dev, PTR_ERR(dp->rst), -- 2.34.1