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[144.49.247.21]) by smtp-relay.gmail.com with ESMTPS id 71dfb90a1353d-5760f7d8812sm26514e0c.5.2026.05.14.15.46.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 May 2026 15:46:01 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-dl1-f71.google.com with SMTP id a92af1059eb24-1306c2f7037so9354344c88.0 for ; Thu, 14 May 2026 15:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1778798760; x=1779403560; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to; bh=s//+cJLOqGfhMPJywnZiCkEjChuLnDZJbKoKcWaLsV8=; b=PA8y555nRzM/Tzw6t9NG58TLe8spPDtvirrIIvRWtOXjmF3xBb3HIaCnX+OzPH84RX NZSE6QLxR1p9KBcAbWbDru20Yi4kUX7oP5MQksvXl3h6QCTFK5lo9UzQ2QhfLophGzIQ FEQsgPqVJjxpU+Yk2wP+kqdrxyri23Vv6Uza8= X-Received: by 2002:a05:7022:6621:b0:12d:ba61:2518 with SMTP id a92af1059eb24-1350451e621mr505920c88.18.1778798760256; Thu, 14 May 2026 15:46:00 -0700 (PDT) X-Received: by 2002:a05:7022:6621:b0:12d:ba61:2518 with SMTP id a92af1059eb24-1350451e621mr505900c88.18.1778798759522; Thu, 14 May 2026 15:45:59 -0700 (PDT) Received: from mombasawalam-Precision-5820-Tower.cap.broadcom.net ([192.19.50.250]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-134cbdcf140sm6678737c88.5.2026.05.14.15.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 15:45:59 -0700 (PDT) From: Maaz Mombasawala To: dri-devel@lists.freedesktop.org Cc: bcm-kernel-feedback-list@broadcom.com, ian.forbes@broadcom.com, zack.rusin@broadcom.com, Maaz Mombasawala Subject: [PATCH v3 2/5] drm/vmwgfx: Check vrefresh in drm_mode_setcrtc. Date: Thu, 14 May 2026 15:48:16 -0700 Message-ID: <20260514224819.3631763-3-maaz.mombasawala@broadcom.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260514224819.3631763-1-maaz.mombasawala@broadcom.com> References: <20260514224819.3631763-1-maaz.mombasawala@broadcom.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Maaz Mombasawala Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the mode_valid() callback in drm_mode_config_funcs to check for valid mode during drm_mode_setcrtc. Both the mode_valid() callbacks also check if the vrefresh value is correct. This fixes igt test kms_invalid_mode@overflow-vrefresh. Signed-off-by: Maaz Mombasawala --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 9 +++++++++ drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 12 +++--------- 3 files changed, 40 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 1b407b61f683..4db29b645a38 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -1063,8 +1063,36 @@ vmw_kms_atomic_check_modeset(struct drm_device *dev, return ret; } +static enum drm_mode_status +vmw_kms_config_mode_valid(struct drm_device *dev, + const struct drm_display_mode *mode) +{ + enum drm_mode_status ret; + struct vmw_private *dev_priv = vmw_priv(dev); + u64 assumed_cpp = dev_priv->assume_16bpp ? 2 : 4; + /* Align width and height to account for GPU tile over-alignment */ + u64 required_mem = ALIGN(mode->hdisplay, GPU_TILE_SIZE) * + ALIGN(mode->vdisplay, GPU_TILE_SIZE) * + assumed_cpp; + required_mem = ALIGN(required_mem, PAGE_SIZE); + + ret = drm_mode_validate_size(mode, dev_priv->texture_max_width, + dev_priv->texture_max_height); + if (ret != MODE_OK) + return ret; + + if (required_mem > dev_priv->max_primary_mem) + return MODE_MEM; + + if (!drm_mode_vrefresh(mode)) + return MODE_BAD; + + return MODE_OK; +} + static const struct drm_mode_config_funcs vmw_kms_funcs = { .fb_create = vmw_kms_fb_create, + .mode_valid = vmw_kms_config_mode_valid, .atomic_check = vmw_kms_atomic_check_modeset, .atomic_commit = drm_atomic_helper_commit, }; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h index 2224d7d91d1b..1b717caecc78 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h @@ -16,6 +16,15 @@ #include #include +/* + * Some renderers such as llvmpipe will align the width and height of their + * buffers to match their tile size. We need to keep this in mind when exposing + * modes to userspace so that this possible over-allocation will not exceed + * graphics memory. 64x64 pixels seems to be a reasonable upper bound for the + * tile size of current renderers. + */ +#define GPU_TILE_SIZE 64 + /** * struct vmw_du_update_plane - Closure structure for vmw_du_helper_plane_update * @plane: Plane which is being updated. diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 4139837f4caf..04c5c20588d8 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c @@ -45,15 +45,6 @@ #define vmw_connector_to_stdu(x) \ container_of(x, struct vmw_screen_target_display_unit, base.connector) -/* - * Some renderers such as llvmpipe will align the width and height of their - * buffers to match their tile size. We need to keep this in mind when exposing - * modes to userspace so that this possible over-allocation will not exceed - * graphics memory. 64x64 pixels seems to be a reasonable upper bound for the - * tile size of current renderers. - */ -#define GPU_TILE_SIZE 64 - enum stdu_content_type { SAME_AS_DISPLAY = 0, SEPARATE_SURFACE, @@ -870,6 +861,9 @@ vmw_stdu_connector_mode_valid(struct drm_connector *connector, if (required_mem > dev_priv->max_mob_size) return MODE_MEM; + if (!drm_mode_vrefresh(mode)) + return MODE_BAD; + return MODE_OK; } -- 2.54.0