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These operations need to be reverted upon unloading, particularly the WPR2 secure region creation, as its presence prevents the driver from subsequently probing. Thus, prepare the Booter Unloader and FWSEC-SB firmwares when booting the GSP, so they can be executed at unbind time to put the GPU into a state where it can be probed again. Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/driver.rs | 18 +++- drivers/gpu/nova-core/firmware/booter.rs | 1 - drivers/gpu/nova-core/firmware/fwsec.rs | 1 - drivers/gpu/nova-core/gpu.rs | 35 ++++++-- drivers/gpu/nova-core/gsp.rs | 3 + drivers/gpu/nova-core/gsp/boot.rs | 35 ++++++-- drivers/gpu/nova-core/gsp/hal.rs | 21 ++++- drivers/gpu/nova-core/gsp/hal/gh100.rs | 7 +- drivers/gpu/nova-core/gsp/hal/tu102.rs | 141 ++++++++++++++++++++++++++++++- drivers/gpu/nova-core/regs.rs | 5 ++ 10 files changed, 242 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs index ced1d38d206a..20d38a64dcc7 100644 --- a/drivers/gpu/nova-core/driver.rs +++ b/drivers/gpu/nova-core/driver.rs @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +use core::cell::Cell; + use kernel::{ auxiliary, device::Core, @@ -21,7 +23,10 @@ types::ForLt, }; -use crate::gpu::Gpu; +use crate::{ + gpu::Gpu, + gsp, // +}; /// Counter for generating unique auxiliary device IDs. static AUXILIARY_ID_COUNTER: Atomic = Atomic::new(0); @@ -33,6 +38,10 @@ pub(crate) struct NovaCore<'bound> { bar: pci::Bar<'bound, BAR0_SIZE>, #[allow(clippy::type_complexity)] _reg: Devres>, + /// GSP unload bundle, if any. + /// + /// Stored into a `Cell` so it can be [taken](Cell::take) without a mutable reference. + unload_bundle: Cell>, } const BAR0_SIZE: usize = SZ_16M; @@ -94,6 +103,8 @@ fn probe<'bound>( // other threads of execution. unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::())? }; + let mut unload_bundle = None; + Ok(try_pin_init!(NovaCore { bar: pdev.iomap_region_sized::(0, c"nova-core/bar0")?, // TODO: Use `&bar` self-referential pin-init syntax once available. @@ -101,7 +112,7 @@ fn probe<'bound>( // SAFETY: `bar` is initialized before this expression is evaluated // (`try_pin_init!()` initializes fields in declaration order), lives at a pinned // stable address, and is dropped after `gpu` (struct field drop order). - gpu <- Gpu::new(pdev, unsafe { &*core::ptr::from_ref(bar) }), + gpu <- Gpu::new(pdev, unsafe { &*core::ptr::from_ref(bar) }, &mut unload_bundle), _reg: auxiliary::Registration::new( pdev.as_ref(), c"nova-drm", @@ -111,6 +122,7 @@ fn probe<'bound>( crate::MODULE_NAME, (), )?, + unload_bundle: Cell::new(unload_bundle), })) }) } @@ -119,6 +131,6 @@ fn unbind<'bound>( dev: &'bound pci::Device, this: Pin<&'bound Self::Data<'bound>>, ) { - this.gpu.unbind(dev) + this.gpu.unbind(dev, this.unload_bundle.take()) } } diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs index e45e5dc8d5d2..c5e17605e1a3 100644 --- a/drivers/gpu/nova-core/firmware/booter.rs +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -282,7 +282,6 @@ fn new_booter(data: &[u8]) -> Result { #[derive(Copy, Clone, Debug, PartialEq)] pub(crate) enum BooterKind { Loader, - #[expect(unused)] Unloader, } diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs index 8810cb49db67..4108f28cd338 100644 --- a/drivers/gpu/nova-core/firmware/fwsec.rs +++ b/drivers/gpu/nova-core/firmware/fwsec.rs @@ -144,7 +144,6 @@ pub(crate) enum FwsecCommand { /// image into it. Frts { frts_addr: u64, frts_size: u64 }, /// Asks [`FwsecFirmware`] to load pre-OS apps on the PMU. - #[expect(dead_code)] Sb, } diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 75fe1bdb80fe..5af04901b512 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -18,7 +18,10 @@ Falcon, // }, fb::SysmemFlush, - gsp::Gsp, + gsp::{ + self, + Gsp, // + }, regs, }; @@ -261,10 +264,20 @@ pub(crate) struct Gpu<'bound> { } impl<'bound> Gpu<'bound> { - pub(crate) fn new( + /// Create a new [`Gpu`] instance. + /// + /// `pdev` is the PCI device for the GPU, `bar` is its `Bar0` mapping. + /// + /// `unload_bundle` is an output parameter, where the [GSP unload bundle](gsp::UnloadBundle) is + /// to be written. The driver layer will pass the written value back to [`Gpu::unbind`]. + pub(crate) fn new<'init>( pdev: &'bound pci::Device, bar: &'bound Bar0, - ) -> impl PinInit + 'bound { + unload_bundle: &'init mut Option, + ) -> impl PinInit + 'init + where + 'bound: 'init, + { try_pin_init!(Self { spec: Spec::new(pdev.as_ref(), bar).inspect(|spec| { dev_info!(pdev,"NVIDIA ({})\n", spec); @@ -290,14 +303,24 @@ pub(crate) fn new( gsp <- Gsp::new(pdev), - _: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon)? }, + _: { *unload_bundle = gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon)? }, }) } - pub(crate) fn unbind(&self, pdev: &'bound pci::Device) { + pub(crate) fn unbind( + &self, + pdev: &'bound pci::Device, + unload_bundle: Option, + ) { let _ = self .gsp - .unload(pdev.as_ref(), self.bar, &self.gsp_falcon) + .unload( + pdev.as_ref(), + self.bar, + &self.gsp_falcon, + &self.sec2_falcon, + unload_bundle, + ) .inspect_err(|e| dev_err!(pdev, "failed to unload GSP: {:?}\n", e)); } } diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs index 38378f104068..1885cfa5cb38 100644 --- a/drivers/gpu/nova-core/gsp.rs +++ b/drivers/gpu/nova-core/gsp.rs @@ -185,3 +185,6 @@ pub(crate) fn new(pdev: &pci::Device) -> impl PinInit); diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs index 447c9b083039..2968178d0c6d 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -46,7 +46,7 @@ pub(crate) fn boot( chipset: Chipset, gsp_falcon: &Falcon, sec2_falcon: &Falcon, - ) -> Result { + ) -> Result> { let dev = pdev.as_ref(); let hal = super::hal::gsp_hal(chipset); @@ -57,8 +57,8 @@ pub(crate) fn boot( let wpr_meta = Coherent::init(dev, GFP_KERNEL, GspFwWprMeta::new(&gsp_fw, &fb_layout))?; - // Perform the chipset-specific boot sequence. - hal.boot( + // Perform the chipset-specific boot sequence, and retrieve the unload bundle. + let unload_bundle = hal.boot( self.as_mut(), dev, bar, @@ -98,7 +98,7 @@ pub(crate) fn boot( Err(e) => dev_warn!(pdev, "GPU name unavailable: {:?}\n", e), } - Ok(()) + Ok(unload_bundle.map(super::UnloadBundle)) } /// Shut down the GSP and wait until it is offline. @@ -130,16 +130,35 @@ pub(crate) fn unload( dev: &device::Device, bar: &Bar0, gsp_falcon: &Falcon, + sec2_falcon: &Falcon, + unload_bundle: Option, ) -> Result { - // Shut down the GSP. - Self::shutdown_gsp( + // Shut down the GSP. Keep going even in case of error. + let mut res = Self::shutdown_gsp( &self.cmdq, bar, gsp_falcon, commands::PowerStateLevel::Level0, ) - .inspect_err(|e| dev_err!(dev, "Unload guest driver failed: {:?}\n", e))?; + .inspect_err(|e| dev_err!(dev, "GSP shutdown failed: {:?}\n", e)); - Ok(()) + // Run the unload bundle to reset the GSP so it can be booted again. + if let Some(unload_bundle) = unload_bundle { + res = res.and( + unload_bundle + .0 + .run(dev, bar, gsp_falcon, sec2_falcon) + .inspect_err(|e| dev_err!(dev, "Unload bundle failed: {:?}\n", e)), + ); + } else { + dev_warn!( + dev, + "Unload bundle is missing, GSP won't be properly reset.\n" + ); + + res = Err(EAGAIN); + } + + res.inspect(|()| dev_info!(dev, "GSP successfully unloaded\n")) } } diff --git a/drivers/gpu/nova-core/gsp/hal.rs b/drivers/gpu/nova-core/gsp/hal.rs index ae16fd6ba7fb..fe591c124a94 100644 --- a/drivers/gpu/nova-core/gsp/hal.rs +++ b/drivers/gpu/nova-core/gsp/hal.rs @@ -30,9 +30,28 @@ }, }; +/// Trait for types containing the resources and code required to fully reset the GSP. +/// +/// The GSP unload code might run in a situation where we cannot load firmware dynamically (e.g. +/// because we are in shutdown and the file system is not accessible anymore). Thus, the firmware +/// required for unloading is prepared at load time, and stored here until it needs to be run. +pub(super) trait UnloadBundle: Send { + /// Performs the steps required to properly reset the GSP after it has been stopped. + fn run( + &self, + dev: &device::Device, + bar: &Bar0, + gsp_falcon: &Falcon, + sec2_falcon: &Falcon, + ) -> Result; +} + /// Trait implemented by GSP HALs. pub(super) trait GspHal: Send { /// Performs the GSP boot process, loading and running the required firmwares as needed. + /// + /// Upon success, returns the [`UnloadBundle`] to be run (if any) in order to properly reset the + /// GSP after it has been stopped. #[allow(clippy::too_many_arguments)] fn boot( &self, @@ -44,7 +63,7 @@ fn boot( wpr_meta: &Coherent, gsp_falcon: &Falcon, sec2_falcon: &Falcon, - ) -> Result; + ) -> Result>>; /// Performs HAL-specific post-GSP boot tasks. /// diff --git a/drivers/gpu/nova-core/gsp/hal/gh100.rs b/drivers/gpu/nova-core/gsp/hal/gh100.rs index 187fb7dbe40a..46ffc51dc385 100644 --- a/drivers/gpu/nova-core/gsp/hal/gh100.rs +++ b/drivers/gpu/nova-core/gsp/hal/gh100.rs @@ -18,7 +18,10 @@ fb::FbLayout, gpu::Chipset, gsp::{ - hal::GspHal, + hal::{ + GspHal, + UnloadBundle, // + }, Gsp, GspFwWprMeta, // }, @@ -41,7 +44,7 @@ fn boot( _wpr_meta: &Coherent, _gsp_falcon: &Falcon, _sec2_falcon: &Falcon, - ) -> Result { + ) -> Result>> { Err(ENOTSUPP) } } diff --git a/drivers/gpu/nova-core/gsp/hal/tu102.rs b/drivers/gpu/nova-core/gsp/hal/tu102.rs index b7a88f3ecea9..fe6fcb84b03d 100644 --- a/drivers/gpu/nova-core/gsp/hal/tu102.rs +++ b/drivers/gpu/nova-core/gsp/hal/tu102.rs @@ -32,7 +32,10 @@ }, gpu::Chipset, gsp::{ - hal::GspHal, + hal::{ + GspHal, + UnloadBundle, // + }, sequencer::{ GspSequencer, GspSequencerParams, // @@ -44,6 +47,124 @@ vbios::Vbios, // }; +// A ready-to-run FWSEC unload firmware. +// +// Since there are two variants of the prepared firmware (with and without a bootloader), this type +// abstracts the difference. +enum FwsecUnloadFirmware { + WithoutBl(FwsecFirmware), + WithBl(FwsecFirmwareWithBl), +} + +impl FwsecUnloadFirmware { + /// Loads the FWSEC SB firmware, as well as its bootloader if `chipset` requires it. + fn new( + dev: &device::Device, + bar: &Bar0, + chipset: Chipset, + bios: &Vbios, + gsp_falcon: &Falcon, + ) -> Result { + let fwsec_sb = FwsecFirmware::new(dev, gsp_falcon, bar, bios, FwsecCommand::Sb)?; + + Ok(if chipset.needs_fwsec_bootloader() { + Self::WithBl(FwsecFirmwareWithBl::new(fwsec_sb, dev, chipset)?) + } else { + Self::WithoutBl(fwsec_sb) + }) + } + + /// Runs the FWSEC SB firmware. + fn run( + &self, + dev: &device::Device, + bar: &Bar0, + gsp_falcon: &Falcon, + ) -> Result<()> { + match self { + Self::WithoutBl(fw) => fw.run(dev, gsp_falcon, bar), + Self::WithBl(fw) => fw.run(dev, gsp_falcon, bar), + } + } +} + +// Contains the firmware required to fully reset GSP on chipsets where the GSP is started using +// FWSEC/Booter. +struct Sec2UnloadBundle { + fwsec_sb: FwsecUnloadFirmware, + booter_unloader: BooterFirmware, +} + +impl Sec2UnloadBundle { + /// Load and prepare the resources required to properly reset the GSP after it has been stopped. + fn build( + dev: &device::Device, + bar: &Bar0, + chipset: Chipset, + bios: &Vbios, + gsp_falcon: &Falcon, + sec2_falcon: &Falcon, + ) -> Result> { + KBox::new( + Self { + fwsec_sb: FwsecUnloadFirmware::new(dev, bar, chipset, bios, gsp_falcon)?, + booter_unloader: BooterFirmware::new( + dev, + BooterKind::Unloader, + chipset, + FIRMWARE_VERSION, + sec2_falcon, + bar, + )?, + }, + GFP_KERNEL, + ) + .map(|b| b as KBox) + .map_err(Into::into) + } +} + +impl UnloadBundle for Sec2UnloadBundle { + fn run( + &self, + dev: &device::Device, + bar: &Bar0, + gsp_falcon: &Falcon, + sec2_falcon: &Falcon, + ) -> Result<()> { + // Run FWSEC-SB to reset the GSP falcon to its pre-libos state. + self.fwsec_sb.run(dev, bar, gsp_falcon)?; + + // Remove WPR2 region if set. + let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI); + if wpr2_hi.is_wpr2_set() { + sec2_falcon.reset(bar)?; + sec2_falcon.load(dev, bar, &self.booter_unloader)?; + + // Sentinel value to confirm that Booter Unloader has run. + const MAILBOX_SENTINEL: u32 = 0xff; + let (mbox0, _) = + sec2_falcon.boot(bar, Some(MAILBOX_SENTINEL), Some(MAILBOX_SENTINEL))?; + if mbox0 != 0 { + dev_err!(dev, "Booter Unloader returned error 0x{:x}\n", mbox0); + return Err(EINVAL); + } + + // Confirm that the WPR2 region has been removed. + let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI); + if wpr2_hi.is_wpr2_set() { + dev_err!( + dev, + "WPR2 region still set after Booter Unloader returned\n" + ); + return Err(EBUSY); + } + } + + Ok(()) + } +} + /// Helper function to load and run the FWSEC-FRTS firmware and confirm that it has properly /// created the WPR2 region. fn run_fwsec_frts( @@ -143,7 +264,7 @@ fn boot( wpr_meta: &Coherent, gsp_falcon: &Falcon, sec2_falcon: &Falcon, - ) -> Result { + ) -> Result>> { let bios = Vbios::new(dev, bar)?; // FWSEC-FRTS is not executed on chips where the FRTS region size is 0 (e.g. GA100). @@ -175,7 +296,21 @@ fn boot( )? .run(dev, bar, sec2_falcon, wpr_meta)?; - Ok(()) + // Last, try and prepare the unload bundle. If this fails, the GPU will need to be reset + // before the driver can be probed again. + let unload_bundle = + Sec2UnloadBundle::build(dev, bar, chipset, &bios, gsp_falcon, sec2_falcon) + .inspect_err(|e| { + dev_warn!(dev, "Failed to prepare unload firmware: {:?}\n", e); + dev_warn!(dev, "The GSP won't be able to unload properly on unbind.\n"); + dev_warn!( + dev, + "The GPU will need to be reset before the driver can bind again.\n" + ); + }) + .ok(); + + Ok(unload_bundle) } fn post_boot( diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 6faeed73901d..356fbf364ea5 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -175,6 +175,11 @@ impl NV_PFB_PRI_MMU_WPR2_ADDR_HI { pub(crate) fn higher_bound(self) -> u64 { u64::from(self.hi_val()) << 12 } + + /// Returns whether the WPR2 region is currently set. + pub(crate) fn is_wpr2_set(self) -> bool { + self.hi_val() != 0 + } } // PGSP -- 2.54.0