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Thu, 21 May 2026 07:47:16 -0700 (PDT) Received: from [127.0.1.1] ([2a11:3:200::109e]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36a5bff3ef3sm476527a91.4.2026.05.21.07.47.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 07:47:15 -0700 (PDT) From: Jun Nie Date: Thu, 21 May 2026 22:46:05 +0800 Subject: [PATCH v4 3/5] drm/msm/dsi: Support dual panel use case with single CRTC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260521-sm8650-7-1-bonded-dsi-v4-3-a4dd5e0850f1@linaro.org> References: <20260521-sm8650-7-1-bonded-dsi-v4-0-a4dd5e0850f1@linaro.org> In-Reply-To: <20260521-sm8650-7-1-bonded-dsi-v4-0-a4dd5e0850f1@linaro.org> To: Rob Clark , Dmitry Baryshkov , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jun Nie X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779374785; l=3355; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=KnQNWhFGZp33dCjq6OXiRZfhx2zq6YDbC/BM4AvYDFo=; b=nMdcNoK7/z8Uvsq3qZxzJYj4k6T+yPZNRjhZ4FVWWK4hodIv7ywVAZaXqYzqN6eh4rNaL0DUK 4O0zFdXVKxcDx+0rHZUOJMKzSINWRX6pZDrVJ97WSdEdwIz1gI2bbTY X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Support a hardware configuration where two independent DSI panels are driven by a single, synchronous CRTC. This configuration uses a bonded DSI link to provide a unified vblank for both displays. This allows application software to treat the two displays as a single, wide framebuffer with a synchronized refresh cycle, simplifying rendering logic for side-by-side panel arrangements. At the DSI host level, the frame width for each link must be that of an individual panel. The driver therefore halves the CRTC's horizontal resolution before configuring the DSI host and any DSC encoders, ensuring each panel receives the correct half of the framebuffer. While the DSI panel driver should manage two panels togehter. 1. During probe, the driver finds the sibling dsi host via device tree phandle and register the 2nd panel to get another mipi_dsi_device. 2. Set dual_panel flag on both mipi_dsi_device. 3. Prepare DSC data per requirement from single panel. 4. All DSI commands should be send on every DSI link. 5. Handle power supply for 2 panels in one shot, the same is true to brightness. 6. From the CRTC's perspective, the two panels appear as one wide display. The driver exposes a DRM mode where the horizontal timings (hdisplay, hsync_start, etc.) are doubled, while the vertical timings remain those of a single panel. Because 2 panels are expected to be mounted in left/right position. To maintain synchronization, both DSI links are configured to share a single clock source, with the DSI1 controller using the clock provided to DSI0 as below. &mdss_dsi1 { assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; } Signed-off-by: Jun Nie --- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index d14b6e41dcd90..4d7ac01aa393d 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -186,6 +186,7 @@ struct msm_dsi_host { bool registered; bool power_on; bool enabled; + bool is_dual_panel; int irq; }; @@ -1024,7 +1025,10 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) return; } - dsc->pic_width = mode->hdisplay; + if (msm_host->is_dual_panel) + dsc->pic_width = hdisplay; + else + dsc->pic_width = mode->hdisplay; dsc->pic_height = mode->vdisplay; DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); @@ -1705,6 +1709,7 @@ static int dsi_host_attach(struct mipi_dsi_host *host, if (dsi->lanes > msm_host->num_data_lanes) return -EINVAL; + msm_host->is_dual_panel = dsi->dual_panel; msm_host->channel = dsi->channel; msm_host->lanes = dsi->lanes; msm_host->format = dsi->format; @@ -2596,6 +2601,9 @@ enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, if (!msm_host->dsc) return MODE_OK; + if (msm_host->is_dual_panel) + pic_width = mode->hdisplay / 2; + if (pic_width % dsc->slice_width) { pr_err("DSI: pic_width %d has to be multiple of slice %d\n", pic_width, dsc->slice_width); -- 2.43.0