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([103.218.174.23]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-841d70b855csm1651909b3a.38.2026.05.27.01.58.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 01:58:10 -0700 (PDT) From: Sudarshan Shetty To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, luca.ceresoli@bootlin.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, alexander.stein@ew.tq-group.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Sudarshan Shetty Subject: [PATCH v4 1/2] drm: bridge: ti-sn65dsi83: Remove NO_HFP and NO_HBP mode flags for LVDS stability Date: Wed, 27 May 2026 14:27:35 +0530 Message-Id: <20260527085736.920390-2-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260527085736.920390-1-tessolveupstream@gmail.com> References: <20260527085736.920390-1-tessolveupstream@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current DSI mode configuration disables horizontal front porch (HFP) and back porch (HBP) transmission using MIPI_DSI_MODE_VIDEO_NO_HFP and MIPI_DSI_MODE_VIDEO_NO_HBP. However, the SN65DSI83/84 bridge relies on receiving full horizontal timing information over DSI in order to correctly reconstruct the LVDS output timings. When HFP and HBP are not transmitted, the bridge cannot recreate the required timing parameters, resulting in unstable or missing display output on some panels. The SN65DSI84 datasheet also describes transmission of complete horizontal timing information as part of the DSI video stream. Remove MIPI_DSI_MODE_VIDEO_NO_HFP and MIPI_DSI_MODE_VIDEO_NO_HBP so that HFP and HBP timing information is transmitted to the bridge. Reference: SN65DSI84 Datasheet, Section 7.4.7 (page 20): https://www.ti.com/lit/ds/symlink/sn65dsi84.pdf?ts=1776924088430&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FSN65DSI84 Tested-by: Luca Ceresoli Tested-by: Alexander Stein Signed-off-by: Sudarshan Shetty --- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c index 42b451432bbb..c03ff1ea9df8 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c @@ -977,7 +977,6 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx) dsi->lanes = dsi_lanes; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET; ret = devm_mipi_dsi_attach(dev, dsi); -- 2.34.1