From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Manna, Animesh" <animesh.manna@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "Murthy, Arun R" <arun.r.murthy@intel.com>,
"Nikula, Jani" <jani.nikula@intel.com>,
"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization
Date: Thu, 12 Mar 2026 06:17:36 +0000 [thread overview]
Message-ID: <22f4f23f363fcfd24114f46aeb113edb7bba7f77.camel@intel.com> (raw)
In-Reply-To: <20260312050035.3493690-4-animesh.manna@intel.com>
On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> As per DP specification,
> The DP Source device may optionally enable PR optimization
> with DP tunneling. The device shall query the Tunneling Bridge’s
> PR tunneling optimization capability by way of the
> Panel_Replay_Tunneling_Optimization_Support bit in the
> DP_TUNNELING_CAPABILITIES register (DPCD E000Dh[6]), and then
> enable PR
> only when the Tunneling Bridge is capable.
>
> Therefore, do not enable Panel Replay for DP tunneling when
> optimization
> support is not available.
>
> Suggested-by: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 632527ede29f..3ec407a801b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1796,6 +1796,13 @@ static bool
> _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
> crtc_state->link_off_after_as_sdp_when_pr_active =
> compute_link_off_after_as_sdp_when_pr_active(connector);
> crtc_state->disable_as_sdp_when_pr_active =
> compute_disable_as_sdp_when_pr_active(connector);
>
> + if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
> + !intel_dp_tunnel_pr_optimization_supported(intel_dp)) {
> + drm_dbg_kms(display->drm,
> + "Panel Replay is disabled as DP
> tunelling enabled without
typo tunelling vs. tunneling. How about:
"Panel Replay is disabled as DP tunnelling PR optimization not
supported."
?
BR,
Jouni Högander
> optimization\n");
> + return false;
> + }
> +
> if (!intel_dp_is_edp(intel_dp))
> return true;
>
next prev parent reply other threads:[~2026-03-12 6:18 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 5:00 [PATCH v7 0/3] Panel Replay BW optimization Animesh Manna
2026-03-12 5:00 ` [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support Animesh Manna
2026-03-12 6:40 ` Hogander, Jouni
2026-03-12 8:36 ` Manna, Animesh
2026-03-13 4:30 ` Claude review: " Claude Code Review Bot
2026-03-12 5:00 ` [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling Animesh Manna
2026-03-12 6:44 ` Hogander, Jouni
2026-03-12 8:44 ` Manna, Animesh
2026-03-13 4:30 ` Claude review: " Claude Code Review Bot
2026-03-12 5:00 ` [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization Animesh Manna
2026-03-12 6:17 ` Hogander, Jouni [this message]
2026-03-12 8:33 ` Manna, Animesh
2026-03-13 4:30 ` Claude review: " Claude Code Review Bot
2026-03-12 8:05 ` [PATCH v7 0/3] Panel Replay BW optimization Hogander, Jouni
2026-03-12 8:41 ` Manna, Animesh
2026-03-12 15:18 ` Imre Deak
2026-03-13 4:30 ` Claude review: " Claude Code Review Bot
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