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[209.85.221.178]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-56d9bce02f3sm19848978e0c.14.2026.04.08.06.01.44 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Apr 2026 06:01:45 -0700 (PDT) Received: by mail-vk1-f178.google.com with SMTP id 71dfb90a1353d-56a9c5cb48bso1863115e0c.0 for ; Wed, 08 Apr 2026 06:01:44 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWNZh0Rj8uE9O3dqOy4ZlU4Rez04/CCOiZJr43AdHbl910n5V6dwsvkr8wBAO2dkI5Yr/Jpw+6+Cqk=@lists.freedesktop.org X-Received: by 2002:a05:6122:a05:b0:566:2711:d8ab with SMTP id 71dfb90a1353d-56dab90cf81mr7244283e0c.6.1775653285855; Wed, 08 Apr 2026 06:01:25 -0700 (PDT) MIME-Version: 1.0 References: <481fefa0c9f6f0629a663fe3da1fb17e7f4a1a05.1775636898.git.tommaso.merciai.xr@bp.renesas.com> In-Reply-To: <481fefa0c9f6f0629a663fe3da1fb17e7f4a1a05.1775636898.git.tommaso.merciai.xr@bp.renesas.com> From: Geert Uytterhoeven Date: Wed, 8 Apr 2026 15:01:13 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AQROBzB38k87n7vfkgAHJ2zbU_998n7zblsjoYLjCSjeXBMYaqe_VAmcFna50bs Message-ID: Subject: Re: [PATCH v6 21/21] arm64: dts: renesas: r9a09g047e57-smarc: Enable DU0 and DSI support To: Tommaso Merciai Cc: tomm.merciai@gmail.com, laurent.pinchart@ideasonboard.com, linux-renesas-soc@vger.kernel.org, biju.das.jz@bp.renesas.com, Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Magnus Damm , Laurent Pinchart , Tomi Valkeinen , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Tommaso, On Wed, 8 Apr 2026 at 12:40, Tommaso Merciai wrote: > Enable DU0, DSI and ADV7535 on RZ/G3E SMARC EVK. > > Signed-off-by: Tommaso Merciai Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi > @@ -33,6 +33,7 @@ aliases { > ethernet0 = ð0; > ethernet1 = ð1; > i2c2 = &i2c2; > + i2c7 = &i2c7; > mmc0 = &sdhi0; > mmc2 = &sdhi2; > }; > @@ -77,12 +78,47 @@ reg_vdd0p8v_others: regulator-vdd0p8v-others { > regulator-always-on; > }; > > + reg_1p8v_adv: regulator-1p8v-adv { Please preserve sort order (alphabetical, by node name). > + compatible = "regulator-fixed"; > + regulator-name = "fixed-1.8V"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + reg_3p3v_adv: regulator-3p3v-adv { > + compatible = "regulator-fixed"; > + regulator-name = "fixed-3.3V"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + regulator-always-on; > + }; Why not reusing the existing reg_1p8v and reg_3p3v? Note that reg_1p8v driving eMMC and QSPI are also not the same physical power rail. > + > + osc1: cec-clock { Please preserve sort order (alphabetical, by node name). > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <12000000>; > + }; > + > /* 32.768kHz crystal */ > x3: x3-clock { > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <32768>; > }; > + > + dsi-to-hdmi-out { hdmi-out? Please preserve sort order (alphabetical, by node name). > + compatible = "hdmi-connector"; > + type = "d"; > + > + port { > + dsi_to_hdmi_out: endpoint { > + remote-endpoint = <&adv7535_out>; > + }; > + }; > + }; > }; > > &audio_extal_clk { > @@ -107,6 +143,37 @@ ð1 { > status = "okay"; > }; > > +&dsi { Please preserve sort-order (alphabetical, by label). > + status = "okay"; > + > + ports { > + port@0 { > + dsi_in0: endpoint { > + remote-endpoint = <&du0_out_dsi>; > + }; > + }; > + > + port@2 { > + dsi_out: endpoint { > + remote-endpoint = <&adv7535_in>; > + data-lanes = <1 2 3 4>; > + }; > + }; > + }; > +}; > + > +&du0 { > + status = "okay"; > + > + ports { > + port@0 { > + du0_out_dsi: endpoint { > + remote-endpoint = <&dsi_in0>; > + }; > + }; > + }; > +}; > + > &gpu { > status = "okay"; > mali-supply = <®_vdd0p8v_others>; > @@ -132,6 +199,48 @@ raa215300: pmic@12 { > }; > }; > > +&i2c7 { > + pinctrl-0 = <&i2c7_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + clock-frequency = <400000>; > + > + adv7535: hdmi@3d { > + compatible = "adi,adv7535"; > + reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>; > + reg-names = "main", "edid", "cec", "packet"; > + clocks = <&osc1>; > + clock-names = "cec"; > + avdd-supply = <®_1p8v_adv>; > + dvdd-supply = <®_1p8v_adv>; > + pvdd-supply = <®_1p8v_adv>; > + a2vdd-supply = <®_1p8v_adv>; > + v3p3-supply = <®_3p3v_adv>; > + v1p2-supply = <®_1p8v_adv>; > + adi,dsi-lanes = <4>; > + interrupts-extended = <&pinctrl RZG3E_GPIO(L, 4) IRQ_TYPE_EDGE_FALLING>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + adv7535_in: endpoint { > + remote-endpoint = <&dsi_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + adv7535_out: endpoint { > + remote-endpoint = <&dsi_to_hdmi_out>; > + }; > + }; > + }; > + }; > +}; > + > &i3c { > pinctrl-0 = <&i3c_pins>; > pinctrl-names = "default"; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds