RE: [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support

["Manna, Animesh" <animesh.manna@intel.com>]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, March 12, 2026 12:10 PM
> To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Manna,
> Animesh <animesh.manna@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Deak, Imre <imre.deak@intel.com>
> Subject: Re: [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr
> optimization support
> 
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > Add api to check panel replay optimization supported or not to
> > drm-core DP tunneling framework which can be used by other driver as
> > well.
> >
> > Suggested-by: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/display/drm_dp_tunnel.c        | 17
> > +++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 14 ++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_dp_tunnel.h |  6 ++++++
> >  include/drm/display/drm_dp_tunnel.h            |  6 ++++++
> >  4 files changed, 43 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c
> > b/drivers/gpu/drm/display/drm_dp_tunnel.c
> > index f442430d8de7..39c07cb4123b 100644
> > --- a/drivers/gpu/drm/display/drm_dp_tunnel.c
> > +++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
> > @@ -149,6 +149,7 @@ struct drm_dp_tunnel {
> >  	bool bw_alloc_enabled:1;
> >  	bool has_io_error:1;
> >  	bool destroyed:1;
> > +	bool pr_optimization_support:1;
> >  };
> >
> >  struct drm_dp_tunnel_group_state;
> > @@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
> >
> >  	tunnel->bw_alloc_supported =
> > tunnel_reg_bw_alloc_supported(regs);
> >  	tunnel->bw_alloc_enabled =
> > tunnel_reg_bw_alloc_enabled(regs);
> > +	tunnel->pr_optimization_support = tunnel_reg(regs,
> > DP_TUNNELING_CAPABILITIES) &
> > +
> > DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
> >
> >  	if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
> >  		kfree(tunnel);
> > @@ -1036,6 +1039,20 @@ bool
> drm_dp_tunnel_bw_alloc_is_enabled(const
> > struct drm_dp_tunnel *tunnel)
> >  }
> >  EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
> >
> > +/**
> > + * drm_dp_tunnel_pr_optimization_supported - Query the PR BW
> > optimization support
> > + * @tunnel: Tunnel object
> > + *
> > + * Query if the PR BW optimization is supported for @tunnel.
> > + *
> > + * Returns %true if the PR BW optimiation is supported for @tunnel.
> > + */
> > +bool drm_dp_tunnel_pr_optimization_supported(const struct
> > drm_dp_tunnel *tunnel)
> > +{
> > +	return tunnel && tunnel->pr_optimization_support; }
> > +EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
> > +
> >  static int clear_bw_req_state(struct drm_dp_aux *aux)
> >  {
> >  	u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED |
> DP_BW_REQUEST_FAILED;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > index 1fd1ac8d556d..075aea9d6ede 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > @@ -296,6 +296,20 @@ bool intel_dp_tunnel_bw_alloc_is_enabled(struct
> > intel_dp *intel_dp)
> >  	return drm_dp_tunnel_bw_alloc_is_enabled(intel_dp->tunnel);
> >  }
> >
> > +/**
> > + * intel_dp_tunnel_pr_optimization_supported - Query the PR BW
> > optimization support
> > + * @intel_dp: DP port object
> > + *
> > + * Query whether a DP tunnel is connected on @intel_dp and the
> > tunnel supports
> > + * the PR BW optimization.
> 
> How this is checking if DP tunnel is connected? To me it looks like it is just
> checking if PR BW optimization is supported.
> 
> > + *
> > + * Returns %true if the BW allocation mode is supported on
> > @intel_dp.
> > + */
> > +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> > *intel_dp)
> > +{
> > +	return drm_dp_tunnel_pr_optimization_supported(intel_dp-
> > >tunnel);
> > +}
> 
> I would guess it is not ok to mix Intel specific and generic drm changes into
> one patch.

Sure, will split in different patch.

> 
> Maybe you could add:
> 
> if (DISPLAY_VER(display) < 35)
> 	return false;
> 
> into here? Otherwise you need to modify check in patch 3 as:
> 
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
>     (DISPLAY_VER(display) < 35 ||
>      !intel_dp_tunnel_pr_optimization_supported(intel_dp)))
>

Sure, will add in intel_dp_tunnel_pr_optimization_supported().

Regards,
Animesh
 
> 	   BR,
> Jouni Högander
> 
> > +
> >  /**
> >   * intel_dp_tunnel_suspend - Suspend a DP tunnel connected on a port
> >   * @intel_dp: DP port object
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > index 7f0f720e8dca..03e147736b65 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > @@ -32,6 +32,7 @@ void intel_dp_tunnel_resume(struct intel_dp
> > *intel_dp,
> >  void intel_dp_tunnel_suspend(struct intel_dp *intel_dp);
> >
> >  bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp);
> > +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> > *intel_dp);
> >
> >  void
> >  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> > intel_atomic_state *state);
> > @@ -76,6 +77,11 @@ static inline bool
> > intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp
> >  	return false;
> >  }
> >
> > +static inline bool intel_dp_tunnel_pr_optimization_supported(struct
> > intel_dp *intel_dp)
> > +{
> > +	return false;
> > +}
> > +
> >  static inline void
> >  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> > intel_atomic_state *state) {}
> >
> > diff --git a/include/drm/display/drm_dp_tunnel.h
> > b/include/drm/display/drm_dp_tunnel.h
> > index 87212c847915..4aa3ce9fd829 100644
> > --- a/include/drm/display/drm_dp_tunnel.h
> > +++ b/include/drm/display/drm_dp_tunnel.h
> > @@ -53,6 +53,7 @@ int drm_dp_tunnel_destroy(struct drm_dp_tunnel
> > *tunnel);
> >  int drm_dp_tunnel_enable_bw_alloc(struct drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_disable_bw_alloc(struct drm_dp_tunnel *tunnel);
> >  bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
> > *tunnel);
> > +bool drm_dp_tunnel_pr_optimization_supported(const struct
> > drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw);
> >  int drm_dp_tunnel_get_allocated_bw(struct drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_update_state(struct drm_dp_tunnel *tunnel); @@
> > -140,6 +141,11 @@ static inline bool
> > drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
> >  	return false;
> >  }
> >
> > +static inline bool drm_dp_tunnel_pr_optimization_supported(const
> > struct drm_dp_tunnel *tunnel)
> > +{
> > +	return false;
> > +}
> > +
> >  static inline int
> >  drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)
> >  {