From: Zhang Zhenzhe <zhenzhe.zhang@outlook.com>
To: "amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>,
Rodrigo Siqueira <siqueira@igalia.com>,
Alex Deucher <alexander.deucher@amd.com>,
Christian König <christian.koenig@amd.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Austin Zheng <austin.zheng@amd.com>, Jun Lei <jun.lei@amd.com>,
"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [PATCH] drm/amd/display: Increase DCN314 SR latency by 1us
Date: Fri, 13 Mar 2026 15:14:14 +0000 [thread overview]
Message-ID: <KUZPR04MB9265F4DDEF7627D2E3747BBBE645A@KUZPR04MB9265.apcprd04.prod.outlook.com> (raw)
[Why & How]
On laptops with LPDDR5 modules, underflow can be observed.
It's unclear why it only occurs on specific desktop contents. However,
increasing enter/exit latencies by 1us seems to resolve it.
Fixes: https://gitlab.freedesktop.org/drm/amd/-/issues/5065
Signed-off-by: Zhenzhe Zhang <zhenzhe.zhang@outlook.com>
---
.../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 16 ++++++++--------
.../drm/amd/display/dc/dml/dcn314/dcn314_fpu.c | 4 ++--
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index 0cb37827a..7a910cc6d 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
@@ -450,32 +450,32 @@ static struct wm_table lpddr5_wm_table = {
.wm_inst = WM_A,
.wm_type = WM_TYPE_PSTATE_CHG,
.pstate_latency_us = 11.65333,
- .sr_exit_time_us = 30.0,
- .sr_enter_plus_exit_time_us = 32.0,
+ .sr_exit_time_us = 31.0,
+ .sr_enter_plus_exit_time_us = 33.0,
.valid = true,
},
{
.wm_inst = WM_B,
.wm_type = WM_TYPE_PSTATE_CHG,
.pstate_latency_us = 11.65333,
- .sr_exit_time_us = 30.0,
- .sr_enter_plus_exit_time_us = 32.0,
+ .sr_exit_time_us = 31.0,
+ .sr_enter_plus_exit_time_us = 33.0,
.valid = true,
},
{
.wm_inst = WM_C,
.wm_type = WM_TYPE_PSTATE_CHG,
.pstate_latency_us = 11.65333,
- .sr_exit_time_us = 30.0,
- .sr_enter_plus_exit_time_us = 32.0,
+ .sr_exit_time_us = 31.0,
+ .sr_enter_plus_exit_time_us = 33.0,
.valid = true,
},
{
.wm_inst = WM_D,
.wm_type = WM_TYPE_PSTATE_CHG,
.pstate_latency_us = 11.65333,
- .sr_exit_time_us = 30.0,
- .sr_enter_plus_exit_time_us = 32.0,
+ .sr_exit_time_us = 31.0,
+ .sr_enter_plus_exit_time_us = 33.0,
.valid = true,
},
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
index df9d50b9b..37c760fbb 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
@@ -148,8 +148,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_14_soc = {
},
},
.num_states = 5,
- .sr_exit_time_us = 16.5,
- .sr_enter_plus_exit_time_us = 18.5,
+ .sr_exit_time_us = 17.5,
+ .sr_enter_plus_exit_time_us = 19.5,
.sr_exit_z8_time_us = 268.0,
.sr_enter_plus_exit_z8_time_us = 393.0,
.writeback_latency_us = 12.0,
--
2.53.0
next reply other threads:[~2026-03-15 11:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 15:14 Zhang Zhenzhe [this message]
2026-03-16 2:18 ` Claude review: drm/amd/display: Increase DCN314 SR latency by 1us Claude Code Review Bot
2026-03-16 2:18 ` Claude Code Review Bot
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