From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB4961093177 for ; Fri, 20 Mar 2026 07:03:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C61710EA88; Fri, 20 Mar 2026 07:03:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; secure) header.d=pm.me header.i=@pm.me header.b="TF5qGqOU"; dkim-atps=neutral Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2578D10EA88 for ; Fri, 20 Mar 2026 07:02:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773990177; x=1774249377; bh=jMvCsZ59x3tWS2RUz/pZcaEggkrELqRs5zNhCzUuqWo=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=TF5qGqOUumLopeUQUuBVOz5WrwH8IrGTB42SAlFDKJtJEZjWRGutiwpsQGDgx+3sk 1/MirGKhh4+mgKRzk6bOcHn6y3lXdraDdSDUbPyxRN30M1JPzjU7lNC5N8tJD3oT0B VoVSm4b3MMlcfUO/nZuS8n34/4+tLtRhmoNVC/zs1gTG/RDD90JldqTHq1L3MvcmYx gmm9YL2lpDJzOjCm8h2vcmCnCcjHnziD28sF/CaP8WxVAeE5KdKoIgEnwyh+xAxnBv mt1ayfIwZaIhoGPhxu6ZmuPn2od55KMtIJo+9qQT6Dd9JXrqmmE9SWdfs28SZUMuBF FIItCdrsWoTqA== Date: Fri, 20 Mar 2026 07:02:54 +0000 To: Alexander Koskovich From: Alexander Koskovich Cc: Dmitry Baryshkov , Jonathan Marek , Neil Armstrong , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Jeffrey Hugo , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org Subject: Re: [PATCH v3 4/4] drm/msm/dpu: fix video mode DSC INTF timing width calculation Message-ID: In-Reply-To: References: <20260319-dsi-rgb101010-support-v3-0-85b99df2d090@pm.me> <3gLK4s97giqqXagfHKhfiIHbfbl2snwfOj9dcTNGPUYi10w9-1EdATqzz1LPCVTpz4bLFYOm8u_Fl8PfC7t5yabows4UCzRKVwjraEWW6hc=@pm.me> <3f8763af-aad2-4d92-90c8-cfd290212503@linaro.org> <7fb9dd9d-13f9-7bba-93d1-08f42dd6ee38@marek.ca> Feedback-ID: 37836894:user:proton X-Pm-Message-ID: 5e012a168b37548f92366937e341cbd52bc7a89f MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Friday, March 20th, 2026 at 2:50 AM, Alexander Koskovich wrote: > On Friday, March 20th, 2026 at 2:38 AM, Dmitry Baryshkov wrote: >=20 > > On Fri, Mar 20, 2026 at 04:46:02AM +0000, Alexander Koskovich wrote: > > > On Friday, March 20th, 2026 at 12:25 AM, Jonathan Marek wrote: > > > > > > > On 3/19/26 9:45 PM, Dmitry Baryshkov wrote: > > > > > On Thu, Mar 19, 2026 at 01:23:03PM -0400, Jonathan Marek wrote: > > > > ... > > > > >> > > > > >> That's not how it works. INTF (which feeds DSI) is after DSC com= pression. > > > > >> > > > > >> INTF timings are always in RGB888 (24-bit) units. Ignoring wideb= us details, > > > > >> the INTF timing should match what is programmed on the DSI side = (hdisplay, > > > > >> which is calculated as bytes per line / 3). > > > > >> > > > > >> (fwiw, the current "timing->width =3D ..." calculation here blam= es to me, but > > > > >> what I wrote originally was just "timing->width =3D timing->widt= h / 3" with a > > > > >> comment about being incomplete.) > > > > >> > > > > > Okay. After reading the docs (sorry, it took a while). > > > > > > > > > > - When widebus is not enabled, the transfer is always 24 bit of > > > > > compressed data. Thus if it is not in play, pclk and timing->w= idth > > > > > should be scaled by source_pixel_depth / compression_ratio / 2= 4. In > > > > > case of the code it is 'drm_dsc_get_bpp_int(dsc) / 24'. > > > > > > > > > > For RGB101010 / 8bpp DSC this should result in the PCLK being = lowered > > > > > by the factor of 3 (=3D 24 / (30 / 3.75)) > > > > > > > > > > - When widebus is in play (MDSS 6.x+, DSI 2.4+), the transfer tak= es > > > > > more than 24 bits. In this case the PCLK and timing->width sho= uld be > > > > > scaled exactly by the DSC compression ratio, which is > > > > > 'drm_dsc_get_bpp_int(dsc) / (3 * dsc->bits_per_component). > > > > > > > > > > So, this piece of code needs to be adjusted to check for the wide= bus > > > > > being enabled or not. > > > > > > > > > > > > > The widebus adjustment on the MDP/INTF side is already in > > > > dpu_hw_intf_setup_timing_engine: the "data width" is divided by 2 f= or > > > > 48-bit widebus instead of 24-bit. there shouldn't be any other > > > > adjustment (downstream doesn't have any other adjustment). > > > > > > > > a relevant downstream comment: "In DATABUS-WIDEN mode, MDP always s= ends > > > > out 48-bit compressed data per pclk and on average, DSI consumes an > > > > amount of compressed data equivalent to the uncompressed pixel dept= h per > > > > pclk." > > > > > > > > Based on that comment, this patch is correct, and the > > > > ''drm_dsc_get_bpp_int(dsc) / (3 * dsc->bits_per_component)' adjustm= ent > > > > only applies to DSI. > > > > > > If I keep the INTF side at /24 and change the DSI side to: > > > > > > if (wide_bus) > > > new_hdisplay =3D DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bp= p_int(dsc), dsc->bits_per_component * 3); > > > else > > > new_hdisplay =3D DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bp= p_int(dsc), 24); > > > > Please check the actual fps (I'm usually using a vblank-synced GL, e.g. > > kmscube). > > > > At least this matches my expectations. >=20 > Hmmm with kmscube I am getting 120FPS with 24 and 100FPS with 30. So I gu= ess that's a no go Although it was using dsc->bits_per_component * 3 regardless before for dsi_adjust_pclk_for_compression so I guess that's what Jonathan was referring to earlier... >=20 > > > > > > > > This also works on my panel. > > > > > > Should I send this in a v4 for this series or just leave it for a sep= erate > > > change as panel seems to work with /24 here anyways? > > > > > > > (note: newer downstream looks like it would divide > > > > by 3.75 here, which doesn't make sense. older downstream would divi= de by > > > > 3 here. I guess downstream is broken now and video mode + 10-bit ds= c > > > > doesn't get tested?) > > > > > > > > on DSI side, "uncompressed pixel depth" shouldn't matter either: DS= I > > > > only sees the compressed data. But based on that comment, when wide= bus > > > > is enabled, by setting DSI_VID_CFG0_DST_FORMAT(?) to 30bpp, then th= e DSI > > > > pclk is in 30-bit units instead of 24-bits. And with this series DS= I > > > > side ends up with the right result if 30bpp format and widebus is e= nabled. > > > > > > > > > > > > > > Thanks, > > > Alex > > > > -- > > With best wishes > > Dmitry > > >=20 >