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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a0eeb3e9a2sm1832057e87.55.2026.02.23.14.44.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Feb 2026 14:45:01 -0800 (PST) Date: Tue, 24 Feb 2026 00:44:58 +0200 From: Dmitry Baryshkov To: Ekansh Gupta Cc: Oded Gabbay , Jonathan Corbet , Shuah Khan , Joerg Roedel , Will Deacon , Robin Murphy , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , Christian =?utf-8?B?S8O2bmln?= , dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, Srinivas Kandagatla , Bharath Kumar , Chenna Kesava Raju Subject: Re: [PATCH RFC 04/18] accel/qda: Add built-in compute CB bus for QDA and integrate with IOMMU Message-ID: References: <20260224-qda-firstpost-v1-0-fe46a9c1a046@oss.qualcomm.com> <20260224-qda-firstpost-v1-4-fe46a9c1a046@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260224-qda-firstpost-v1-4-fe46a9c1a046@oss.qualcomm.com> X-Authority-Analysis: v=2.4 cv=O6A0fR9W c=1 sm=1 tr=0 ts=699cd86f cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=xqWC_Br6kY4A:10 a=kj9zAlcOel0A:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=m81VUDHjpZwfiQc3ckkA:9 a=CjuIK1q_8ugA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-ORIG-GUID: b2ZgN7jbch-U3FGaGp3oSTHFPfHXcruu X-Proofpoint-GUID: b2ZgN7jbch-U3FGaGp3oSTHFPfHXcruu X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIzMDE5NyBTYWx0ZWRfX+WKXE67RNZUm ld15U56XN+hWJrIdKsjyhiomweqN1TSUzm2fs25TtrCEhZj5FYhkb4oVloJbcAOWvOlpOR3nkiH SUK2mrUtn22xEQzAFCv592acRy2Tw1qxZ5VtoEyAUMAj4/fsI6oavcxHWDbf7sTno68vwf4YN5+ NNx1n6eKutFjMkGv5WjwSp28vs2Xjo+VGvnSQVqkH+eeEZy0lZ5U9yuQbjECHPs+me0XUHIvIZS XwmQSEbNMdap+L0/nWtqnfz7lpxxTEAf6XO+92sCaCjrXG/LqAwkWQ9oVkkiUTpsVy2PFKqXq4F +qAnuDPYxh1RI+fKzxqcK7wd2vIO04o9KF0Lbt+LIpmPMlNab2gOSTtjqGb5WFDXmrcjw68bgT6 P+Y7VxqhDCd+u8iQ9ZPGxL6KIsmyrITmPQUtLsEmnlmddISA5VnzKZXib1/t7LxtBWK6EwYrcZl fNNPqCo9JD7M1NI6qxw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-23_05,2026-02-23_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 priorityscore=1501 impostorscore=0 phishscore=0 malwarescore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602230197 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, Feb 24, 2026 at 12:38:58AM +0530, Ekansh Gupta wrote: > Introduce a built-in compute context-bank (CB) bus used by the Qualcomm > DSP accelerator (QDA) driver to represent DSP CB devices that require > IOMMU configuration. This separates the CB bus from the QDA driver and > allows QDA to remain a loadable module while the bus is always built-in. Why? What is the actual problem that you are trying to solve? > > A new bool Kconfig symbol DRM_ACCEL_QDA_COMPUTE_BUS is added and is Don't describe the patch contents. Please. > selected by the main DRM_ACCEL_QDA driver. The parent accel Makefile is > updated to descend into the QDA directory for both built-in and module > builds so that the CB bus is compiled into vmlinux while the driver > remains modular. > > The CB bus is registered at postcore_initcall() time and is exposed to > the IOMMU core through iommu_buses[] in the same way as the Tegra > host1x context-bus. This enables later patches to create CB devices on > this bus and obtain IOMMU domains for them. Note, there is nothing QDA-specific in this patch. Please explain, why the bus is QDA-specific? Can we generalize it? > > Signed-off-by: Ekansh Gupta > --- > drivers/accel/Makefile | 1 + > drivers/accel/qda/Kconfig | 5 +++++ > drivers/accel/qda/Makefile | 2 ++ > drivers/accel/qda/qda_compute_bus.c | 23 +++++++++++++++++++++++ > drivers/iommu/iommu.c | 4 ++++ > include/linux/qda_compute_bus.h | 22 ++++++++++++++++++++++ > 6 files changed, 57 insertions(+) > > diff --git a/drivers/accel/Makefile b/drivers/accel/Makefile > index 58c08dd5f389..9ed843cd293f 100644 > --- a/drivers/accel/Makefile > +++ b/drivers/accel/Makefile > @@ -6,4 +6,5 @@ obj-$(CONFIG_DRM_ACCEL_HABANALABS) += habanalabs/ > obj-$(CONFIG_DRM_ACCEL_IVPU) += ivpu/ > obj-$(CONFIG_DRM_ACCEL_QAIC) += qaic/ > obj-$(CONFIG_DRM_ACCEL_QDA) += qda/ > +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda/ > obj-$(CONFIG_DRM_ACCEL_ROCKET) += rocket/ > \ No newline at end of file > diff --git a/drivers/accel/qda/Kconfig b/drivers/accel/qda/Kconfig > index 484d21ff1b55..ef1fa384efbe 100644 > --- a/drivers/accel/qda/Kconfig > +++ b/drivers/accel/qda/Kconfig > @@ -3,11 +3,16 @@ > # Qualcomm DSP accelerator driver > # > > + > +config DRM_ACCEL_QDA_COMPUTE_BUS > + bool > + > config DRM_ACCEL_QDA > tristate "Qualcomm DSP accelerator" > depends on DRM_ACCEL > depends on ARCH_QCOM || COMPILE_TEST > depends on RPMSG > + select DRM_ACCEL_QDA_COMPUTE_BUS > help > Enables the DRM-based accelerator driver for Qualcomm's Hexagon DSPs. > This driver provides a standardized interface for offloading computational > diff --git a/drivers/accel/qda/Makefile b/drivers/accel/qda/Makefile > index e7f23182589b..242684ef1af7 100644 > --- a/drivers/accel/qda/Makefile > +++ b/drivers/accel/qda/Makefile > @@ -8,3 +8,5 @@ obj-$(CONFIG_DRM_ACCEL_QDA) := qda.o > qda-y := \ > qda_drv.o \ > qda_rpmsg.o \ > + > +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda_compute_bus.o > diff --git a/drivers/accel/qda/qda_compute_bus.c b/drivers/accel/qda/qda_compute_bus.c > new file mode 100644 > index 000000000000..1d9c39948fb5 > --- /dev/null > +++ b/drivers/accel/qda/qda_compute_bus.c > @@ -0,0 +1,23 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > +#include > +#include > + > +struct bus_type qda_cb_bus_type = { > + .name = "qda-compute-cb", > +}; > +EXPORT_SYMBOL_GPL(qda_cb_bus_type); > + > +static int __init qda_cb_bus_init(void) > +{ > + int err; > + > + err = bus_register(&qda_cb_bus_type); > + if (err < 0) { > + pr_err("qda-compute-cb bus registration failed: %d\n", err); > + return err; > + } > + return 0; > +} > + > +postcore_initcall(qda_cb_bus_init); > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c > index 4926a43118e6..5dee912686ee 100644 > --- a/drivers/iommu/iommu.c > +++ b/drivers/iommu/iommu.c > @@ -33,6 +33,7 @@ > #include > #include > #include > +#include > #include > > #include "dma-iommu.h" > @@ -178,6 +179,9 @@ static const struct bus_type * const iommu_buses[] = { > #ifdef CONFIG_CDX_BUS > &cdx_bus_type, > #endif > +#ifdef CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS > + &qda_cb_bus_type, > +#endif > }; > > /* > diff --git a/include/linux/qda_compute_bus.h b/include/linux/qda_compute_bus.h > new file mode 100644 > index 000000000000..807122d84e3f > --- /dev/null > +++ b/include/linux/qda_compute_bus.h > @@ -0,0 +1,22 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __QDA_COMPUTE_BUS_H__ > +#define __QDA_COMPUTE_BUS_H__ > + > +#include > + > +/* > + * Custom bus type for QDA compute context bank (CB) devices > + * > + * This bus type is used for manually created CB devices that represent > + * IOMMU context banks. The custom bus allows proper IOMMU configuration > + * and device management for these virtual devices. > + */ > +#ifdef CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS > +extern struct bus_type qda_cb_bus_type; > +#endif > + > +#endif /* __QDA_COMPUTE_BUS_H__ */ > > -- > 2.34.1 > -- With best wishes Dmitry