From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: None Date: Sun, 15 Feb 2026 19:01:01 +1000 Message-ID: In-Reply-To: <20260215085140.20499-1-clamor95@gmail.com> References: <20260215085140.20499-1-clamor95@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: None Author: None Patches: 0 Reviewed: 2026-02-15T19:01:01.789602 --- This 8-patch series adds batch userptr allocation support to amdkfd, allowing= multiple non-contiguous CPU virtual address ranges to be mapped to a single = contiguous GPU virtual address space via the existing `AMDKFD_IOC_ALLOC_MEMOR= Y_OF_GPU` ioctl. The design uses a single MMU interval notifier covering the = VA span with an interval tree for efficient range lookup during invalidation = callbacks, which is a sound architectural choice. The series has several significant issues that need addressing before it can = be merged. The most critical are: (1) missing upper bound on `num_ranges` fro= m userspace, allowing excessive kernel memory allocation; (2) the return valu= e of `set_user_pages_batch()` is silently ignored in `init_user_pages_batch()= `, which could lead to `ttm_bo_validate` operating on a corrupt pages array; = (3) the error paths in `amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu_batch()` leak= the mem limit reservation when `drm_vma_node_allow()` or `drm_gem_handle_cre= ate()` fails; and (4) the `size` parameter of `init_user_pages_batch()` is `u= int32_t` but receives a `uint64_t` value, silently truncating sizes above 4GB. Additionally, the patch references functions (`amdgpu_ttm_tt_get_user_pages_d= one`, `amdgpu_ttm_tt_discard_user_pages`) and uses types (`struct hmm_range *= ` in `user_range_info`) that do not match the upstream kernel tree's API (`am= dgpu_hmm_range_alloc`/`amdgpu_hmm_range_free`, `struct amdgpu_hmm_range *`). = This suggests the series was developed against an AMD staging tree with a dif= ferent internal API, and needs reconciliation for upstream submission. --- Generated by Claude Code Patch Reviewer