[PATCH 0/2] 6.12 and below: amdgpu: fix panic with SI and DC

[PATCH 0/2] 6.12 and below: amdgpu: fix panic with SI and DC

[Rosen Penev]

The first commit is needed for the second one to be reverted cleanly.

The second breaks DC support on my AMD 7750. Kernel panics and I get a
black screen on boot. With these two reverted, 6.12 is usable again.

Tried to git cherry-pick the fixes but that proved to be difficult to
do cleanly.

I see 6.6 also has these two commits.

Not sure what the proper procedure is to request reverts on stable
kernels.

Rosen Penev (2):
  Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"
  Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel
    clocks (v3)"

 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 36 ----------------------
 1 file changed, 36 deletions(-)

--
2.53.0

[PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

[Rosen Penev]

This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.

Cc: Timur Kristóf <timur.kristof@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 29cecfab0704..05eaa06dfa34 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3486,11 +3486,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 	 * for these GPUs to calculate bandwidth requirements.
 	 */
 	if (high_pixelclock_count) {
-		/* Work around flickering lines at the bottom edge
-		 * of the screen when using a single 4K 60Hz monitor.
-		 */
-		disable_mclk_switching = true;
-
 		/* On Oland, we observe some flickering when two 4K 60Hz
 		 * displays are connected, possibly because voltage is too low.
 		 * Raise the voltage by requiring a higher SCLK.
-- 
2.53.0

[PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Rosen Penev]

This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.

This commit breaks stable kernels older than 6.18 that are booted with
radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1

In 6.17, threre are further commits that are needed to get the DC
codepath in amdgpu for Southern Islands GPUs working but they seem to be
too much of a hastle to backport cleanly. The simplest solution is to
revert this problematic commit

Cc: Timur Kristóf <timur.kristof@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 31 ----------------------
 1 file changed, 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 05eaa06dfa34..c4386c86153b 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3426,14 +3426,12 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 {
 	struct  si_ps *ps = si_get_ps(rps);
 	struct amdgpu_clock_and_voltage_limits *max_limits;
-	struct amdgpu_connector *conn;
 	bool disable_mclk_switching = false;
 	bool disable_sclk_switching = false;
 	u32 mclk, sclk;
 	u16 vddc, vddci, min_vce_voltage = 0;
 	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
 	u32 max_sclk = 0, max_mclk = 0;
-	u32 high_pixelclock_count = 0;
 	int i;
 
 	if (adev->asic_type == CHIP_HAINAN) {
@@ -3466,35 +3464,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 		}
 	}
 
-	/* We define "high pixelclock" for SI as higher than necessary for 4K 30Hz.
-	 * For example, 4K 60Hz and 1080p 144Hz fall into this category.
-	 * Find number of such displays connected.
-	 */
-	for (i = 0; i < adev->mode_info.num_crtc; i++) {
-		if (!(adev->pm.dpm.new_active_crtcs & (1 << i)) ||
-			!adev->mode_info.crtcs[i]->enabled)
-			continue;
-
-		conn = to_amdgpu_connector(adev->mode_info.crtcs[i]->connector);
-
-		if (conn->pixelclock_for_modeset > 297000)
-			high_pixelclock_count++;
-	}
-
-	/* These are some ad-hoc fixes to some issues observed with SI GPUs.
-	 * They are necessary because we don't have something like dce_calcs
-	 * for these GPUs to calculate bandwidth requirements.
-	 */
-	if (high_pixelclock_count) {
-		/* On Oland, we observe some flickering when two 4K 60Hz
-		 * displays are connected, possibly because voltage is too low.
-		 * Raise the voltage by requiring a higher SCLK.
-		 * (Voltage cannot be adjusted independently without also SCLK.)
-		 */
-		if (high_pixelclock_count > 1 && adev->asic_type == CHIP_OLAND)
-			disable_sclk_switching = true;
-	}
-
 	if (rps->vce_active) {
 		rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
 		rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
-- 
2.53.0

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

[Greg KH]

On Fri, Feb 20, 2026 at 07:44:01PM -0800, Rosen Penev wrote:
> This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.

Why?  You need to explain why you do something, not just what you are
doing.

And this is a 6.12.59 commit, explain, in detail why you aren't wanting
it reverted anywhere else INCLUDING upstream.

thanks,

greg k-h

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Greg KH]

On Fri, Feb 20, 2026 at 07:44:02PM -0800, Rosen Penev wrote:
> This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
> 
> This commit breaks stable kernels older than 6.18 that are booted with
> radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
> 
> In 6.17, threre are further commits that are needed to get the DC
> codepath in amdgpu for Southern Islands GPUs working but they seem to be
> too much of a hastle to backport cleanly. The simplest solution is to
> revert this problematic commit

Ok, this is better, but still, this only applies to 6.12.y, right?

thanks,

greg k-h

Re: [PATCH 0/2] 6.12 and below: amdgpu: fix panic with SI and DC

[Greg KH]

On Fri, Feb 20, 2026 at 07:44:00PM -0800, Rosen Penev wrote:
> The first commit is needed for the second one to be reverted cleanly.
> 
> The second breaks DC support on my AMD 7750. Kernel panics and I get a
> black screen on boot. With these two reverted, 6.12 is usable again.
> 
> Tried to git cherry-pick the fixes but that proved to be difficult to
> do cleanly.
> 
> I see 6.6 also has these two commits.
> 
> Not sure what the proper procedure is to request reverts on stable
> kernels.

Close, see my comments on the first patch.

thanks,

greg k-h

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Rosen Penev]

On Fri, Feb 20, 2026 at 9:41 PM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Fri, Feb 20, 2026 at 07:44:02PM -0800, Rosen Penev wrote:
> > This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
> >
> > This commit breaks stable kernels older than 6.18 that are booted with
> > radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
> >
> > In 6.17, threre are further commits that are needed to get the DC
> > codepath in amdgpu for Southern Islands GPUs working but they seem to be
> > too much of a hastle to backport cleanly. The simplest solution is to
> > revert this problematic commit
>
> Ok, this is better, but still, this only applies to 6.12.y, right?
The reverted commit (or rather the one from master) was backported to
at least 6.12 and 6.6. I didn't check what other kernels include it.
>
> thanks,
>
> greg k-h

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

[Rosen Penev]

On Fri, Feb 20, 2026 at 9:40 PM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Fri, Feb 20, 2026 at 07:44:01PM -0800, Rosen Penev wrote:
> > This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.
>
> Why?  You need to explain why you do something, not just what you are
> doing.
Not sure how to specify that it's a requirement for the second patch
so that git revert works without problems.
>
> And this is a 6.12.59 commit, explain, in detail why you aren't wanting
> it reverted anywhere else INCLUDING upstream.
>
> thanks,
>
> greg k-h

Re: [PATCH 0/2] 6.12 and below: amdgpu: fix panic with SI and DC

[Rosen Penev]

On Fri, Feb 20, 2026 at 9:41 PM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Fri, Feb 20, 2026 at 07:44:00PM -0800, Rosen Penev wrote:
> > The first commit is needed for the second one to be reverted cleanly.
> >
> > The second breaks DC support on my AMD 7750. Kernel panics and I get a
> > black screen on boot. With these two reverted, 6.12 is usable again.
> >
> > Tried to git cherry-pick the fixes but that proved to be difficult to
> > do cleanly.
> >
> > I see 6.6 also has these two commits.
> >
> > Not sure what the proper procedure is to request reverts on stable
> > kernels.
>
> Close, see my comments on the first patch.
OK. I'll wait a bit before resubmitting.
>
> thanks,
>
> greg k-h

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

[Greg KH]

On Fri, Feb 20, 2026 at 09:54:02PM -0800, Rosen Penev wrote:
> On Fri, Feb 20, 2026 at 9:40 PM Greg KH <gregkh@linuxfoundation.org> wrote:
> >
> > On Fri, Feb 20, 2026 at 07:44:01PM -0800, Rosen Penev wrote:
> > > This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.
> >
> > Why?  You need to explain why you do something, not just what you are
> > doing.
> Not sure how to specify that it's a requirement for the second patch
> so that git revert works without problems.

Just say so, nothing complex here, just describe the problem and what is
needed to resolve it.  This ends up in the changelog, your patch 0/2
does not.

thanks,

greg k-h

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Greg KH]

On Fri, Feb 20, 2026 at 09:52:29PM -0800, Rosen Penev wrote:
> On Fri, Feb 20, 2026 at 9:41 PM Greg KH <gregkh@linuxfoundation.org> wrote:
> >
> > On Fri, Feb 20, 2026 at 07:44:02PM -0800, Rosen Penev wrote:
> > > This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
> > >
> > > This commit breaks stable kernels older than 6.18 that are booted with
> > > radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
> > >
> > > In 6.17, threre are further commits that are needed to get the DC
> > > codepath in amdgpu for Southern Islands GPUs working but they seem to be
> > > too much of a hastle to backport cleanly. The simplest solution is to
> > > revert this problematic commit
> >
> > Ok, this is better, but still, this only applies to 6.12.y, right?
> The reverted commit (or rather the one from master) was backported to
> at least 6.12 and 6.6. I didn't check what other kernels include it.

I see it in the following kernel releases:
	6.1.156 6.6.112 6.12.53 6.17.3 6.18

All except 6.17.y is currently being supported.

thanks,

greg k-h

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Rosen Penev]

On Fri, Feb 20, 2026 at 10:33 PM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Fri, Feb 20, 2026 at 09:52:29PM -0800, Rosen Penev wrote:
> > On Fri, Feb 20, 2026 at 9:41 PM Greg KH <gregkh@linuxfoundation.org> wrote:
> > >
> > > On Fri, Feb 20, 2026 at 07:44:02PM -0800, Rosen Penev wrote:
> > > > This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
> > > >
> > > > This commit breaks stable kernels older than 6.18 that are booted with
> > > > radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
> > > >
> > > > In 6.17, threre are further commits that are needed to get the DC
> > > > codepath in amdgpu for Southern Islands GPUs working but they seem to be
> > > > too much of a hastle to backport cleanly. The simplest solution is to
> > > > revert this problematic commit
> > >
> > > Ok, this is better, but still, this only applies to 6.12.y, right?
> > The reverted commit (or rather the one from master) was backported to
> > at least 6.12 and 6.6. I didn't check what other kernels include it.
>
> I see it in the following kernel releases:
>         6.1.156 6.6.112 6.12.53 6.17.3 6.18
>
> All except 6.17.y is currently being supported.
Yes. I complained about 6.17 being broken at the time and luckily the
proper fixes got backported to 6.17. There's no issue there.

Those fixes are too involved to be cleanly backported to older
kernels, hence the revert being needed.

I'll mention 6.1 in v2.
>
> thanks,
>
> greg k-h

Claude review: 6.12 and below: amdgpu: fix panic with SI and DC

[Claude Code Review Bot]

Overall Series Review

Subject: 6.12 and below: amdgpu: fix panic with SI and DC
Author: Rosen Penev <rosenp@gmail.com>
Patches: 12
Reviewed: 2026-02-23T06:01:56.568456

---

This is a 2-patch stable-only series requesting reverts of two commits in `si_dpm.c` that added high-pixelclock workarounds for Southern Islands GPUs. The author reports that these commits cause kernel panics on AMD 7750 when booting with `amdgpu.dc=1` on stable kernels older than 6.18. The root cause appears to be that the added code accesses `adev->mode_info.crtcs[i]->connector` via `to_amdgpu_connector()`, which is presumably invalid or NULL under the DC codepath on these older kernels. In 6.17+, further commits reworked this code to use `display_cfg` instead, fixing the issue, but those changes are too involved to backport cleanly.

The code changes themselves are mechanically correct -- they are clean `git revert` outputs that leave the code in a compilable and functional state. The main issues are with the commit messages, which Greg KH has already flagged on the list. Patch 1 has no explanation at all for why the revert is needed, and patch 2 has typos and doesn't specify which stable branches are affected. The submitter has acknowledged a v2 is needed.

One observation worth noting: patch 1 alone does not fix the crash. The offending connector access remains until patch 2 removes it. Between patches 1 and 2, the kernel is still broken when using DC on SI. While this is acceptable for a revert series (individual patches don't need to be independently useful if they're always applied together), it's worth mentioning since this is going into stable.

---
Generated by Claude Code Patch Reviewer

Claude review: Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

[Claude Code Review Bot]

Patch Review

The commit message is just:

> This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.

As Greg KH already pointed out, this needs to explain why the revert is needed. Even though this patch is primarily a prerequisite for patch 2 to revert cleanly, the commit message should say so explicitly, along with a brief description of the overall problem (DC-enabled SI GPUs panic because the high-pixelclock code accesses connector structures that aren't valid under the DC codepath in stable kernels).

The code change itself is straightforward -- it removes the `disable_mclk_switching = true;` assignment and its comment from within the `if (high_pixelclock_count)` block:

> -		/* Work around flickering lines at the bottom edge
> -		 * of the screen when using a single 4K 60Hz monitor.
> -		 */
> -		disable_mclk_switching = true;

After this patch, the `disable_mclk_switching` variable still exists and is still used later in the function; it just won't be set to `true` based on high pixel clock count anymore. The remaining high-pixelclock loop and `conn` variable are still used by the SCLK switching logic, so the code compiles cleanly.

No functional issues with the code change itself. However, note that this patch does not fix the reported crash -- the connector access loop still executes, so the panic persists until patch 2 is also applied.

---
Generated by Claude Code Patch Reviewer

Claude review: Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

[Claude Code Review Bot]

Patch Review

The commit message has a reasonable explanation but has a few issues:

> In 6.17, threre are further commits that are needed to get the DC
> codepath in amdgpu for Southern Islands GPUs working but they seem to be
> too much of a hastle to backport cleanly. The simplest solution is to
> revert this problematic commit

Typos: "threre" should be "there", "hastle" should be "hassle". The last paragraph is also missing a period. Per the mailing list discussion, the commit message should also specify which stable kernels are affected (6.1.y, 6.6.y, 6.12.y) and clarify that 6.17+ already has proper fixes.

The code change removes the entire high-pixelclock counting loop and its associated logic:

> -	for (i = 0; i < adev->mode_info.num_crtc; i++) {
> -		if (!(adev->pm.dpm.new_active_crtcs & (1 << i)) ||
> -			!adev->mode_info.crtcs[i]->enabled)
> -			continue;
> -
> -		conn = to_amdgpu_connector(adev->mode_info.crtcs[i]->connector);
> -
> -		if (conn->pixelclock_for_modeset > 297000)
> -			high_pixelclock_count++;
> -	}

This is the code that causes the panic -- the `to_amdgpu_connector()` call on `adev->mode_info.crtcs[i]->connector` likely hits a NULL or invalid pointer when the DC codepath is active on SI GPUs. Removing it fixes the crash.

The patch also cleans up the now-unused variable declarations:

> -	struct amdgpu_connector *conn;
> ...
> -	u32 high_pixelclock_count = 0;

`disable_sclk_switching` remains declared and initialized to `false` but is never set to `true` after both patches. This is correct behavior -- the variable existed before the original commit and is referenced later in the function, so it must stay. It will just always be `false`, effectively disabling the SCLK switching workaround.

No correctness issues with the code change. The tradeoff (losing the flickering workaround vs. fixing a crash) is clearly the right one for stable kernels.

---
Generated by Claude Code Patch Reviewer