From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/vblank: Deferred Enable and Disable Date: Fri, 27 Feb 2026 14:40:52 +1000 Message-ID: In-Reply-To: <20260224212639.390768-1-sunpeng.li@amd.com> References: <20260224212639.390768-1-sunpeng.li@amd.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: drm/vblank: Deferred Enable and Disable Author: Patches: 7 Reviewed: 2026-02-27T14:40:52.376367 --- This series introduces **deferred vblank enable/disable** to the DRM vblank core, motivated by AMD's IPS (Idle Power States) feature where the entire DCN block can be power-gated, requiring the `dc_lock` mutex (blocking) to disallow idle optimizations before accessing vblank HW registers. The approach is well-motivated and the cover letter does a good job explaining the tradeoffs vs. the previously attempted `vblank_prepare()` approach. However, there are **several concerns** with the current implementation, primarily around race conditions between deferred work and `drm_crtc_vblank_off()`, unconditional resource allocation, and `crtc->state` access from worker context. The core idea is sound but needs another iteration to tighten the synchronization. --- --- Generated by Claude Code Patch Reviewer