From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: Add DSI display support for SC8280XP Date: Fri, 27 Feb 2026 14:04:45 +1000 Message-ID: In-Reply-To: <20260225054525.6803-1-mitltlatltl@gmail.com> References: <20260225054525.6803-1-mitltlatltl@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: Add DSI display support for SC8280XP Author: Pengyu Luo Patches: 15 Reviewed: 2026-02-27T14:04:45.091186 --- This series adds DSI display support for the Qualcomm SC8280XP SoC across 5 patches: dt-bindings for the PHY and controller, MDSS binding documentation, the PHY driver table entry, and a large DTS patch adding 4 DSI controllers + 4 PHYs (2 per MDSS instance). The series is logically structured and follows existing patterns for similar Qualcomm SoCs. However, there are several issues that need attention: 1. **Bug: Copy-paste error in mdss1_dsi0 clock parents** (Patch 5) - the byte clock parent incorrectly references `mdss1_dsi1_phy` instead of `mdss1_dsi0_phy`. 2. **Inconsistent PHY PLL register sizes** between mdss0 and mdss1 instances (0x27c vs 0x260). 3. **Patch numbering**: The last patch is labeled `[PATCH]` instead of `[PATCH 5/5]`. 4. **Known non-functional state**: The commit message acknowledges DSI won't work properly without dispcc fixes. --- --- Generated by Claude Code Patch Reviewer