From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: dt-bindings: display: msm: Fix Glymur DP controller reg ranges and clock Date: Tue, 03 Mar 2026 13:37:09 +1000 Message-ID: In-Reply-To: <20260302-glymur-fix-dp-bindings-reg-clocks-v3-0-8fe49ac1f556@oss.qualcomm.com> References: <20260302-glymur-fix-dp-bindings-reg-clocks-v3-0-8fe49ac1f556@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: dt-bindings: display: msm: Fix Glymur DP controller reg ranges and clock Author: Abel Vesa Patches: 5 Reviewed: 2026-03-03T13:37:09.334916 --- This is a 2-patch dt-bindings fix series for the Qualcomm Glymur DisplayPort controller. It separates the Glymur DP compatible from the existing `sc8280xp-dp`/`x1e80100-dp` group (which requires only 5 reg entries) into its own conditional block requiring 9 reg entries (to describe all 4 stream ports plus MST link blocks), and updates the example node in the MDSS binding to match. The changes are straightforward and clearly motivated by review feedback on the actual devicetree nodes. There is one real bug (`clocks-names` typo) and an inconsistency in the commit message description worth flagging. --- Generated by Claude Code Patch Reviewer