From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/msm/dsi: fix pclk calculation for bonded dsi
Date: Mon, 09 Mar 2026 07:54:17 +1000 [thread overview]
Message-ID: <review-overall-20260308070628.482527-1-mitltlatltl@gmail.com> (raw)
In-Reply-To: <20260308070628.482527-1-mitltlatltl@gmail.com>
Overall Series Review
Subject: drm/msm/dsi: fix pclk calculation for bonded dsi
Author: Pengyu Luo <mitltlatltl@gmail.com>
Patches: 2
Reviewed: 2026-03-09T07:54:17.628899
---
This is a single-patch fix for a pixel clock (pclk) calculation issue in bonded DSI mode with DSC compression. The fix is correct and well-motivated. In bonded DSI, each link carries half the display width independently, so the DSC compression rounding (DIV_ROUND_UP) should be applied to each half separately rather than to the full width. The current code rounds once on the full width, which can produce a result that differs by one pixel from what the hardware is actually programmed with in `dsi_timing_setup()`.
The patch has a Reviewed-by from Dmitry Baryshkov and a Fixes tag. The logic is sound and the change is minimal.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-03-08 21:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-08 7:06 [PATCH v2] drm/msm/dsi: fix pclk calculation for bonded dsi Pengyu Luo
2026-03-08 16:55 ` Dmitry Baryshkov
2026-03-08 21:54 ` Claude Code Review Bot [this message]
2026-03-08 21:54 ` Claude review: " Claude Code Review Bot
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