Claude review: soc/qcom/ubwc: rework UBWC configuration database

[Claude Code Review Bot <claude-review@example.com>]

Overall Series Review

Subject: soc/qcom/ubwc: rework UBWC configuration database
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patches: 28
Reviewed: 2026-03-12T07:21:52.437390

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This is a well-structured cleanup series by Dmitry Baryshkov (with one patch from Konrad Dybcio) that reworks the Qualcomm UBWC (Universal Bandwidth Compression) configuration database. The series progressively moves hardware configuration knowledge from per-SoC data tables into helper functions that derive values from the UBWC version, reducing the config database to just `ubwc_enc_version`, `highest_bank_bit`, and a small `flags` field.

The approach is sound: first fix existing bugs (patch 1), add necessary infrastructure (patches 2-3), move consumers to use helpers (patches 4-14), then simplify the database itself (patches 19-25). The final deduplication in patch 25 is a nice payoff.

**Key concerns:**
1. The patches are delivered out of numeric order in the mbox (e.g., patch 09 before 08, 14 before 13, 22 before 21), which could cause confusion for reviewers. This appears to be a mailing list reordering issue, not a logical dependency problem.
2. Patch 1 is a significant behavioral change that needs careful validation - it switches UBWC register programming from being dispatch-by-decoder-version to dispatch-by-MDSS-HW-revision, and simultaneously restructures which registers are programmed for which SoCs.
3. The series has prerequisite patches from another series (iris UBWC), which complicates merging as the cover letter notes.
4. The `/* TODO: highest_bank_bit = 15 for LP_DDR4 */` comments are lost during deduplication in patch 25, which drops useful context.

Overall, this is a good cleanup that removes a lot of error-prone per-SoC duplication. The logic is mostly mechanical and the series is well-decomposed.

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Generated by Claude Code Patch Reviewer