From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: soc/qcom/ubwc: rework UBWC configuration database Date: Fri, 13 Mar 2026 14:12:48 +1000 Message-ID: In-Reply-To: <20260312-ubwc-rework-v3-0-b7e8f800176a@oss.qualcomm.com> References: <20260312-ubwc-rework-v3-0-b7e8f800176a@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: soc/qcom/ubwc: rework UBWC configuration database Author: Dmitry Baryshkov Patches: 28 Reviewed: 2026-03-13T14:12:48.506156 --- This is a well-structured 27-patch series from Dmitry Baryshkov (with one p= atch from Konrad Dybcio) that reworks the Qualcomm UBWC configuration datab= ase. The core insight is that many per-SoC UBWC configuration values are de= rivable from the UBWC version number, and MDSS register programming should = be keyed off MDSS hardware revision rather than UBWC decoder version. **Strengths:** - Clean incremental approach: introduce helpers (patches 2-4), migrate cons= umers (patches 5-17), then remove now-unused database fields (patches 21-27) - The final state is much cleaner =E2=80=94 config reduced to `ubwc_enc_ver= sion`, `highest_bank_bit`, and `flags` - Patch 1 correctly identifies that UBWC register programming depends on MD= SS core revision, not UBWC version - The deduplication in patch 27 is a clear win =E2=80=94 ~30 unique structs= reduced to ~15 **Concerns:** - Merge dependency on another series (iris UBWC patches) requiring cross-tr= ee coordination - Several behavioral corrections embedded within refactoring patches (sc818= 0x macrotile, bank_spread for several SoCs) that should be more explicitly = called out Overall the series is correct and a worthwhile cleanup. Specific issues not= ed below. --- Generated by Claude Code Patch Reviewer