From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: Improvements on RZ/G2L MIPI DSI driver Date: Sun, 22 Mar 2026 04:12:39 +1000 Message-ID: In-Reply-To: <20260319164833.409126-1-biju.das.jz@bp.renesas.com> References: <20260319164833.409126-1-biju.das.jz@bp.renesas.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: Improvements on RZ/G2L MIPI DSI driver Author: Biju Patches: 5 Reviewed: 2026-03-22T04:12:39.924933 --- This is a 4-patch series fixing the RZ/G2L MIPI DSI driver to match hardwar= e manual requirements around the CMN_RSTB reset signal ordering and timing.= The changes are well-motivated by the hardware manual (Rev. 1.50, May 2025= ) and the individual changes are straightforward. The series has a logical = progression: move display timing (patch 1), move assert (patch 2), move dea= ssert (patch 3), fix delay (patch 4). **Concerns:** 1. Patch 1 silently drops error handling from `rzg2l_mipi_dsi_startup()` in= `atomic_pre_enable`. 2. Patch 2 changes the shutdown ordering =E2=80=94 asserting reset *before*= dphy_exit, which may need justification. 3. Patches 1 and 2 carry `Fixes:` tags and Cc stable, but the `Fixes:` tags= on patch 2 are questionable. 4. The patches don't apply to drm-next, likely due to `FIELD_MODIFY` macro = changes in the base they were developed against. --- Generated by Claude Code Patch Reviewer