From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: gpu: nova-core: convert registers to use the kernel register macro Date: Sun, 22 Mar 2026 03:45:04 +1000 Message-ID: In-Reply-To: <20260320-b4-nova-register-v2-0-88fcf103e8d4@nvidia.com> References: <20260320-b4-nova-register-v2-0-88fcf103e8d4@nvidia.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: gpu: nova-core: convert registers to use the kernel register macro Author: Alexandre Courbot Patches: 22 Reviewed: 2026-03-22T03:45:04.241372 --- This is a well-structured 10-patch series that converts nova-core's internal `register!` macro to use the upstream kernel `io::register!` macro that has been merged into the kernel. The conversion is mechanically sound and follows the v2 feedback (descending field order, dropping `nv_reg` wrapper, using `into_raw`, `bounded_enum` macro for falcon enums). The series cleanly removes ~1500 lines of driver-local macro infrastructure and replaces it with ~760 lines using kernel-provided abstractions. The split by register group (PMC, PBUS, PFB, GC6, FUSE, PDISP, falcon) is logical for review, though as the author notes, squashing would be equally valid since partial conversion doesn't make sense. **Key observations:** - The conversion is largely mechanical and appears correct - The `bounded_enum` macro is a reasonable stopgap pending derive macros - There is one inconsistency in patch 1 regarding `self.inner` vs `into_raw()` - The mbox ordering has patches 8 and 9 swapped (patch 9 appears before patch 8 in the mbox), which is just a mail delivery ordering issue No significant bugs found. A few minor items noted below. --- Generated by Claude Code Patch Reviewer