[PATCH v4 0/5] drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing

[PATCH v4 0/5] drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing

[Alexander Koskovich]

This series adds support for the RGB101010 (30bpp) pixel format used by some
newer panels.

Tested on the BOE BF068MWM-TD0 panel (10 bit DSC) on the Nothing Phone (3a).

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
Changes in v4:
- Dropped dpu_encoder_phys_vid patch
  - Needs further discussion and rest of these changes can be independent of that
- Pick back up dropped drm_mipi_dsi.h patch (oops)
- Fix meson driver warning from adding RGB101010 to drm_mipi_dsi.h
- msm_dsi_host_version_ge -> msm_dsi_host_version_geq
- Fix msm_dsi_host_version_geq to handle major > major
- Link to v3: https://lore.kernel.org/r/20260319-dsi-rgb101010-support-v3-0-85b99df2d090@pm.me

Changes in v3:
- Fix typo for MSM8998 DSI version name (V2_2 -> V_2_0)
- Add msm_dsi_host_version_is_gt per Konrad and use for RGB101010 check
- Fix up comment & commit message for video mode DSC INTF timing width change per Neil/Konrad
- Link to v2: https://lore.kernel.org/r/20260318-dsi-rgb101010-support-v2-0-698b7612eaeb@pm.me

Changes in v2:
- Only allow RGB101010 if MSM_DSI_6G_VER >= V2.1.0
- Link to v1: https://lore.kernel.org/r/20260318-dsi-rgb101010-support-v1-0-6021eb79e796@pm.me

---
Alexander Koskovich (5):
      drm/mipi-dsi: add RGB101010 pixel format
      drm/meson: handle RGB101010 in format switches
      drm/msm/dsi: rename MSM8998 DSI version from V2_2_0 to V2_0_0
      drm/msm/dsi: add DSI version >= comparison helper
      drm/msm/dsi: Add support for RGB101010 pixel format

 drivers/gpu/drm/meson/meson_dw_mipi_dsi.c     |  2 ++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c             |  4 ++--
 drivers/gpu/drm/msm/dsi/dsi_cfg.h             |  2 +-
 drivers/gpu/drm/msm/dsi/dsi_host.c            | 22 ++++++++++++++++++++--
 drivers/gpu/drm/msm/registers/display/dsi.xml |  5 ++++-
 include/drm/drm_mipi_dsi.h                    |  4 ++++
 6 files changed, 33 insertions(+), 6 deletions(-)
---
base-commit: f338e77383789c0cae23ca3d48adcc5e9e137e3c
change-id: 20260318-dsi-rgb101010-support-4956b1cd8657

Best regards,
-- 
Alexander Koskovich <akoskovich@pm.me>

[PATCH v4 1/5] drm/mipi-dsi: add RGB101010 pixel format

[Alexander Koskovich]

Add MIPI_DSI_FMT_RGB101010 for 30 bit (10,10,10 RGB) pixel format,
corresponding to the packed 30 bit pixel stream defined in MIPI DSI
v1.3 Section 8.8.17.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 include/drm/drm_mipi_dsi.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 3aba7b380c8d..a822e9e876af 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -140,6 +140,7 @@ struct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node);
 #define MIPI_DSI_HS_PKT_END_ALIGNED	BIT(12)
 
 enum mipi_dsi_pixel_format {
+	MIPI_DSI_FMT_RGB101010,
 	MIPI_DSI_FMT_RGB888,
 	MIPI_DSI_FMT_RGB666,
 	MIPI_DSI_FMT_RGB666_PACKED,
@@ -235,6 +236,9 @@ extern const struct bus_type mipi_dsi_bus_type;
 static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
 {
 	switch (fmt) {
+	case MIPI_DSI_FMT_RGB101010:
+		return 30;
+
 	case MIPI_DSI_FMT_RGB888:
 	case MIPI_DSI_FMT_RGB666:
 		return 24;

-- 
2.53.0

[PATCH v4 2/5] drm/meson: handle RGB101010 in format switches

[Alexander Koskovich]

Add RGB101010 to the unsupported format cases to fix -Wswitch warnings
introduced by the addition of the new pixel format.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index 66c73c512b0e..59fc0083d318 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -119,6 +119,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		dpi_data_format = DPI_COLOR_18BIT_CFG_2;
 		venc_data_width = VENC_IN_COLOR_18B;
 		break;
+	case MIPI_DSI_FMT_RGB101010:
 	case MIPI_DSI_FMT_RGB666_PACKED:
 	case MIPI_DSI_FMT_RGB565:
 		return -EINVAL;
@@ -232,6 +233,7 @@ static int meson_dw_mipi_dsi_host_attach(void *priv_data,
 		break;
 	case MIPI_DSI_FMT_RGB666:
 		break;
+	case MIPI_DSI_FMT_RGB101010:
 	case MIPI_DSI_FMT_RGB666_PACKED:
 	case MIPI_DSI_FMT_RGB565:
 		dev_err(mipi_dsi->dev, "invalid pixel format %d\n", device->format);

-- 
2.53.0

[PATCH v4 3/5] drm/msm/dsi: rename MSM8998 DSI version from V2_2_0 to V2_0_0

[Alexander Koskovich]

The MSM8998 DSI controller is v2.0.0 as stated in commit 7b8c9e203039
("drm/msm/dsi: Add support for MSM8998 DSI controller"). The value was
always correct just the name was wrong.

Rename and reorder to maintain version sorting.

Fixes: 7b8c9e203039 ("drm/msm/dsi: Add support for MSM8998 DSI controller")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 drivers/gpu/drm/msm/dsi/dsi_cfg.c | 4 ++--
 drivers/gpu/drm/msm/dsi/dsi_cfg.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index bd3c51c350e7..da3fe6824495 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -317,10 +317,10 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 		&msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2,
 		&msm8976_dsi_cfg, &msm_dsi_6g_host_ops},
+	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_0_0,
+		&msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0,
 		&sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops},
-	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
-		&msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
 		&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0,
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index 5dc812028bd5..ccf06679608e 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
@@ -19,8 +19,8 @@
 #define MSM_DSI_6G_VER_MINOR_V1_3_1	0x10030001
 #define MSM_DSI_6G_VER_MINOR_V1_4_1	0x10040001
 #define MSM_DSI_6G_VER_MINOR_V1_4_2	0x10040002
+#define MSM_DSI_6G_VER_MINOR_V2_0_0	0x20000000
 #define MSM_DSI_6G_VER_MINOR_V2_1_0	0x20010000
-#define MSM_DSI_6G_VER_MINOR_V2_2_0	0x20000000
 #define MSM_DSI_6G_VER_MINOR_V2_2_1	0x20020001
 #define MSM_DSI_6G_VER_MINOR_V2_3_0	0x20030000
 #define MSM_DSI_6G_VER_MINOR_V2_3_1	0x20030001

-- 
2.53.0

[PATCH v4 4/5] drm/msm/dsi: add DSI version >= comparison helper

[Alexander Koskovich]

Add a helper for checking if the DSI hardware version is greater
than or equal to a given version, for use in a future change.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index db6da99375a1..b55ffe2fdec3 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -782,13 +782,21 @@ static void dsi_ctrl_disable(struct msm_dsi_host *msm_host)
 	dsi_write(msm_host, REG_DSI_CTRL, 0);
 }
 
+static bool msm_dsi_host_version_geq(struct msm_dsi_host *msm_host,
+				    u32 major, u32 minor)
+{
+	return msm_host->cfg_hnd->major > major ||
+	       (msm_host->cfg_hnd->major == major &&
+	       msm_host->cfg_hnd->minor >= minor);
+}
+
 bool msm_dsi_host_is_wide_bus_enabled(struct mipi_dsi_host *host)
 {
 	struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
 
 	return msm_host->dsc &&
-		(msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
-		 msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_5_0);
+		msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G,
+					MSM_DSI_6G_VER_MINOR_V2_5_0);
 }
 
 static void dsi_ctrl_enable(struct msm_dsi_host *msm_host,

-- 
2.53.0

[PATCH v4 5/5] drm/msm/dsi: Add support for RGB101010 pixel format

[Alexander Koskovich]

Add video and command mode destination format mappings for RGB101010,
and extend the VID_CFG0 DST_FORMAT bitfield to 3 bits to accommodate
the new format value.

Make sure this is guarded behind MSM_DSI_6G_VER >= V2.1.0 as anything
older does not support this.

Required for 10 bit panels such as the BOE BF068MWM-TD0.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c            | 10 ++++++++++
 drivers/gpu/drm/msm/registers/display/dsi.xml |  5 ++++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b55ffe2fdec3..67b33f46a93c 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -757,6 +757,7 @@ static inline enum dsi_vid_dst_format
 dsi_get_vid_fmt(const enum mipi_dsi_pixel_format mipi_fmt)
 {
 	switch (mipi_fmt) {
+	case MIPI_DSI_FMT_RGB101010:	return VID_DST_FORMAT_RGB101010;
 	case MIPI_DSI_FMT_RGB888:	return VID_DST_FORMAT_RGB888;
 	case MIPI_DSI_FMT_RGB666:	return VID_DST_FORMAT_RGB666_LOOSE;
 	case MIPI_DSI_FMT_RGB666_PACKED:	return VID_DST_FORMAT_RGB666;
@@ -769,6 +770,7 @@ static inline enum dsi_cmd_dst_format
 dsi_get_cmd_fmt(const enum mipi_dsi_pixel_format mipi_fmt)
 {
 	switch (mipi_fmt) {
+	case MIPI_DSI_FMT_RGB101010:	return CMD_DST_FORMAT_RGB101010;
 	case MIPI_DSI_FMT_RGB888:	return CMD_DST_FORMAT_RGB888;
 	case MIPI_DSI_FMT_RGB666_PACKED:
 	case MIPI_DSI_FMT_RGB666:	return CMD_DST_FORMAT_RGB666;
@@ -1706,6 +1708,14 @@ static int dsi_host_attach(struct mipi_dsi_host *host,
 	if (dsi->lanes > msm_host->num_data_lanes)
 		return -EINVAL;
 
+	if (dsi->format == MIPI_DSI_FMT_RGB101010 &&
+	    !msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G,
+				     MSM_DSI_6G_VER_MINOR_V2_1_0)) {
+		DRM_DEV_ERROR(&msm_host->pdev->dev,
+			      "RGB101010 not supported on this DSI controller\n");
+		return -EINVAL;
+	}
+
 	msm_host->channel = dsi->channel;
 	msm_host->lanes = dsi->lanes;
 	msm_host->format = dsi->format;
diff --git a/drivers/gpu/drm/msm/registers/display/dsi.xml b/drivers/gpu/drm/msm/registers/display/dsi.xml
index c7a7b633d747..e40125f75175 100644
--- a/drivers/gpu/drm/msm/registers/display/dsi.xml
+++ b/drivers/gpu/drm/msm/registers/display/dsi.xml
@@ -15,6 +15,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
 		<value name="VID_DST_FORMAT_RGB666" value="1"/>
 		<value name="VID_DST_FORMAT_RGB666_LOOSE" value="2"/>
 		<value name="VID_DST_FORMAT_RGB888" value="3"/>
+		<value name="VID_DST_FORMAT_RGB101010" value="4"/>
 	</enum>
 	<enum name="dsi_rgb_swap">
 		<value name="SWAP_RGB" value="0"/>
@@ -39,6 +40,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
 		<value name="CMD_DST_FORMAT_RGB565" value="6"/>
 		<value name="CMD_DST_FORMAT_RGB666" value="7"/>
 		<value name="CMD_DST_FORMAT_RGB888" value="8"/>
+		<value name="CMD_DST_FORMAT_RGB101010" value="9"/>
 	</enum>
 	<enum name="dsi_lane_swap">
 		<value name="LANE_SWAP_0123" value="0"/>
@@ -142,7 +144,8 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
 	</reg32>
 	<reg32 offset="0x0000c" name="VID_CFG0">
 		<bitfield name="VIRT_CHANNEL" low="0" high="1" type="uint"/>  <!-- always zero? -->
-		<bitfield name="DST_FORMAT" low="4" high="5" type="dsi_vid_dst_format"/>
+		<!-- high was 5 before DSI 6G 2.1.0 -->
+		<bitfield name="DST_FORMAT" low="4" high="6" type="dsi_vid_dst_format"/>
 		<bitfield name="TRAFFIC_MODE" low="8" high="9" type="dsi_traffic_mode"/>
 		<bitfield name="BLLP_POWER_STOP" pos="12" type="boolean"/>
 		<bitfield name="EOF_BLLP_POWER_STOP" pos="15" type="boolean"/>

-- 
2.53.0

Re: [PATCH v4 2/5] drm/meson: handle RGB101010 in format switches

[Neil Armstrong]

Le 21/03/2026 à 08:52, Alexander Koskovich a écrit :
> Add RGB101010 to the unsupported format cases to fix -Wswitch warnings
> introduced by the addition of the new pixel format.
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
>   drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
> index 66c73c512b0e..59fc0083d318 100644
> --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
> +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
> @@ -119,6 +119,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
>   		dpi_data_format = DPI_COLOR_18BIT_CFG_2;
>   		venc_data_width = VENC_IN_COLOR_18B;
>   		break;
> +	case MIPI_DSI_FMT_RGB101010:
>   	case MIPI_DSI_FMT_RGB666_PACKED:
>   	case MIPI_DSI_FMT_RGB565:
>   		return -EINVAL;
> @@ -232,6 +233,7 @@ static int meson_dw_mipi_dsi_host_attach(void *priv_data,
>   		break;
>   	case MIPI_DSI_FMT_RGB666:
>   		break;
> +	case MIPI_DSI_FMT_RGB101010:
>   	case MIPI_DSI_FMT_RGB666_PACKED:
>   	case MIPI_DSI_FMT_RGB565:
>   		dev_err(mipi_dsi->dev, "invalid pixel format %d\n", device->format);
> 

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Claude review: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing

[Claude Code Review Bot]

Overall Series Review

Subject: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing
Author: Alexander Koskovich <akoskovich@pm.me>
Patches: 7
Reviewed: 2026-03-22T03:12:28.036134

---

This is a well-structured 5-patch series adding RGB101010 (30bpp) pixel format support for MIPI DSI, targeting MSM/Qualcomm DSI controllers v2.1.0+. The series is clean, logically ordered, and has already collected Reviewed-by tags from Dmitry Baryshkov and Konrad Dybcio. The version comparison helper and the version rename fix are good preparatory cleanup.

One notable design point: `MIPI_DSI_FMT_RGB101010` is inserted at the **beginning** of the `mipi_dsi_pixel_format` enum, changing the implicit numeric values of all existing members. While kernel-internal enum usage is by symbolic name, appending at the end is the more conventional and conservative approach. This was presumably accepted by reviewers, so it may be intentional to sort by descending bpp.

Overall: the series looks correct and ready to merge, with minor observations below.

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/mipi-dsi: add RGB101010 pixel format

[Claude Code Review Bot]

Patch Review

The new enum member is added before `MIPI_DSI_FMT_RGB888`:

```c
enum mipi_dsi_pixel_format {
	MIPI_DSI_FMT_RGB101010,
	MIPI_DSI_FMT_RGB888,
```

This shifts the numeric values of all existing members (RGB888 goes from 0 to 1, etc.). While all in-tree usage is by symbolic name, **adding new enum values at the end is conventional practice** in the kernel to minimize risk from out-of-tree consumers or any code that might serialize/deserialize these values. Consider placing it after `MIPI_DSI_FMT_RGB565` instead.

The `mipi_dsi_pixel_format_to_bpp` addition returning 30 is correct per MIPI DSI v1.3 Section 8.8.17.

Note: `drm_mipi_dsi_get_input_bus_fmt()` in `drm_mipi_dsi.c` has a `default` case returning 0 for the new format — this means any bridge driver calling that function for RGB101010 will silently get a 0 bus format. That's acceptable for now since no bridge currently supports RGB101010 on the input side, but a `MEDIA_BUS_FMT_RGB101010_1X30` mapping may eventually be needed.

Also: several drivers do `mipi_dsi_pixel_format_to_bpp(...) / 8` to get bytes-per-pixel (e.g., `sun6i_mipi_dsi.c`, `mcde_dsi.c`). For 30bpp, `30 / 8 = 3` (integer truncation), which is wrong — but those drivers don't support RGB101010, so this is fine in practice.

**Looks good** with the minor suggestion about enum ordering.

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/meson: handle RGB101010 in format switches

[Claude Code Review Bot]

Patch Review

```c
	case MIPI_DSI_FMT_RGB101010:
	case MIPI_DSI_FMT_RGB666_PACKED:
	case MIPI_DSI_FMT_RGB565:
		return -EINVAL;
```

Straightforward addition to both switch statements to avoid `-Wswitch` warnings. Correctly marks RGB101010 as unsupported on this hardware by falling through to the error return/error message.

**No issues.** This is the only non-MSM driver fixed, but other DSI host/bridge drivers that switch on `mipi_dsi_pixel_format` (e.g., `dw-mipi-dsi.c`, `samsung-dsim.c`, `tegra/dsi.c`, `mtk_dsi.c`, etc.) appear to have `default:` cases in their switches, so they won't generate warnings. Worth verifying with a build test across architectures.

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/msm/dsi: rename MSM8998 DSI version from V2_2_0 to V2_0_0

[Claude Code Review Bot]

Patch Review

The old define:
```c
#define MSM_DSI_6G_VER_MINOR_V2_2_0	0x20000000
```

was incorrectly named — `0x20000000` decodes to v2.0.0, not v2.2.0. The rename to `V2_0_0` and reordering to maintain version sorting is correct:

```c
#define MSM_DSI_6G_VER_MINOR_V2_0_0	0x20000000
#define MSM_DSI_6G_VER_MINOR_V2_1_0	0x20010000
```

The `dsi_cfg.c` table entry is also reordered to match. The `Fixes:` tag is appropriate since the original commit introduced the wrong name.

**No issues.** Clean cosmetic fix.

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/msm/dsi: add DSI version >= comparison helper

[Claude Code Review Bot]

Patch Review

```c
static bool msm_dsi_host_version_geq(struct msm_dsi_host *msm_host,
				      u32 major, u32 minor)
{
	return msm_host->cfg_hnd->major > major ||
	       (msm_host->cfg_hnd->major == major &&
	       msm_host->cfg_hnd->minor >= minor);
}
```

The logic is correct for a >= comparison across (major, minor) pairs. The existing open-coded check in `msm_dsi_host_is_wide_bus_enabled` is correctly refactored to use it:

```c
return msm_host->dsc &&
	msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G,
				 MSM_DSI_6G_VER_MINOR_V2_5_0);
```

Note that the old code had an explicit `major == MSM_DSI_VER_MAJOR_6G` check (i.e., it would **not** match for non-6G majors even if the "minor" was numerically higher). The new helper changes the semantics slightly: if `major > MSM_DSI_VER_MAJOR_6G` (i.e., > 0x03), it would now return true, whereas before it would return false. This is likely fine since there is no major version > 0x03 currently, and the new behavior is arguably more correct for forward-compatibility.

**No issues.**

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/msm/dsi: Add support for RGB101010 pixel format

[Claude Code Review Bot]

Patch Review

The format mappings are added to both vid and cmd mode:
```c
case MIPI_DSI_FMT_RGB101010:	return VID_DST_FORMAT_RGB101010;
...
case MIPI_DSI_FMT_RGB101010:	return CMD_DST_FORMAT_RGB101010;
```

The VID_CFG0 DST_FORMAT bitfield is extended from 2 bits to 3 bits:
```xml
<!-- high was 5 before DSI 6G 2.1.0 -->
<bitfield name="DST_FORMAT" low="4" high="6" type="dsi_vid_dst_format"/>
```

This is necessary since value 4 (`VID_DST_FORMAT_RGB101010`) requires 3 bits. The comment documenting the hardware version dependency is helpful.

The version guard in `dsi_host_attach`:
```c
if (dsi->format == MIPI_DSI_FMT_RGB101010 &&
    !msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G,
			       MSM_DSI_6G_VER_MINOR_V2_1_0)) {
```

This correctly gates RGB101010 to v2.1.0+ controllers. Writing bit 6 of DST_FORMAT on older hardware (where that bit belongs to a different field or is reserved) could cause undefined behavior, so the guard is important.

**One minor concern:** The 3-bit DST_FORMAT bitfield is unconditionally defined in the XML register description. On pre-v2.1.0 hardware, bit 6 may overlap with another field. The XML comment notes this, but the generated header will always use the 3-bit definition regardless of hardware version. Since the format guard in `dsi_host_attach` prevents actually writing value 4 on old hardware, this is safe in practice, but it does mean the register description is technically inaccurate for older hardware revisions.

**No blocking issues.**

---
Generated by Claude Code Patch Reviewer

Claude review: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing

[Claude Code Review Bot]

Overall Series Review

Subject: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing
Author: Alexander Koskovich <akoskovich@pm.me>
Patches: 34
Reviewed: 2026-03-22T04:21:56.135972

---

This is a 4-patch series adding RGB101010 (30bpp) pixel format support to the Qualcomm MSM DSI driver and fixing a DSC timing calculation bug for non-8-bit panels. The series is well-structured: fix a naming typo first, add a helper, add the feature, then fix the exposed bug.

**Key concern:** The series depends on `MIPI_DSI_FMT_RGB101010` existing in the `enum mipi_dsi_pixel_format` in `include/drm/drm_mipi_dsi.h`, but this enum value does not exist in the current kernel tree. This means there must be a prerequisite patch (or series) that adds this format to the core DRM DSI subsystem. The series should explicitly mention this dependency in the cover letter, or include the prerequisite patch.

The version rename (patch 1) and DSC timing fix (patch 4) are independently useful and correct. The helper (patch 2) and RGB101010 support (patch 3) are clean.

---
Generated by Claude Code Patch Reviewer

Claude review: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing

[Claude Code Review Bot]

Overall Series Review

Subject: drm/msm: add RGB101010 pixel format and fix 10-bit DSC timing
Author: Alexander Koskovich <akoskovich@pm.me>
Patches: 12
Reviewed: 2026-03-22T04:52:39.673001

---

This 3-patch series adds MIPI DSI RGB101010 (30bpp/10-bit) pixel format support to the MSM DSI driver and fixes a DSC timing calculation for non-8-bit panels. The series is well-motivated (enabling 10-bit panels like the BOE BF068MWM-TD0) and the approach is generally sound, but there are a few issues to address.

**Key concerns:**
1. **Patch 1**: Adding the new enum value at the **beginning** of the enum rather than the end is unconventional and fragile, even though current users only switch on symbolic names.
2. **Patch 3**: A parallel formula in `dsi_host.c:591` (`dsi_adjust_pclk_for_compression`) uses the same `bits_per_component * 3` divisor but is not addressed — this should be investigated for consistency.

---

---
Generated by Claude Code Patch Reviewer