From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/amd/display: Fix DDC register assignment type errors
Date: Wed, 25 Mar 2026 08:17:43 +1000 [thread overview]
Message-ID: <review-overall-20260322095155.248283-1-guilhermeivob@gmail.com> (raw)
In-Reply-To: <20260322095155.248283-1-guilhermeivob@gmail.com>
Overall Series Review
Subject: drm/amd/display: Fix DDC register assignment type errors
Author: guilhermeivo <guilhermeivob@gmail.com>
Patches: 1
Reviewed: 2026-03-25T08:17:43.938571
---
This is a single-patch fix for type errors in the `dcn_define_ddc_registers_common()` function signature. The fix is correct and straightforward. The function parameters used non-existent types (`struct ddc_shift` and `struct ddc_mask`), which should both be `struct ddc_sh_mask`. Every caller in the tree (dcn10, dcn20, dcn21, dcn30, dcn32, dcn315, dcn401, dcn42, dce60, dce80, dce110, dce120) declares their shift/mask variables as `struct ddc_sh_mask`, and `struct hw_ddc` stores them as `const struct ddc_sh_mask *`. The fix is obviously correct.
**Verdict:** Looks good. Minor nit on the commit message below.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-03-24 22:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-22 9:51 [PATCH v2] drm/amd/display: Fix DDC register assignment type errors guilhermeivo
2026-03-24 22:17 ` Claude Code Review Bot [this message]
2026-03-24 22:17 ` Claude review: " Claude Code Review Bot
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