From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm: A8xx Support - Batch 2 Date: Wed, 25 Mar 2026 07:32:07 +1000 Message-ID: In-Reply-To: <20260324-a8xx-gpu-batch2-v1-0-fc95b8d9c017@oss.qualcomm.com> References: <20260324-a8xx-gpu-batch2-v1-0-fc95b8d9c017@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/msm: A8xx Support - Batch 2 Author: Akhil P Oommen Patches: 35 Reviewed: 2026-03-25T07:32:07.645335 --- This is a 16-patch series from Akhil P Oommen (Qualcomm) adding "Batch 2" f= eatures for A8xx GPU support in the MSM/Adreno DRM driver. The series inclu= des bugfixes (patches 1-3), infrastructure improvements (patches 4-8), and = new features: gx_is_on for A8x (9), secure init fix (10), SKU tables (11-12= ), IFPC (13), preemption (14-15), and AQE UAPI (16). Overall the series is reasonable and follows existing driver patterns. Ther= e are some issues worth flagging: **Concerns:** - Patch 5 (coredump on init failures) changes locking semantics in `adreno_= load_gpu()` with a potential double-unlock on the error path - Patch 4 has an off-by-one WARN_ON check - Patch 10 moves code to run on every resume rather than once at probe, whi= ch has correctness and performance implications - Patch 14 puts static inline functions with non-trivial logic in a header = that gets included from two .c files, which could cause linker issues or co= de bloat - The x285/a840 dyn_pwrup_reglist tables (patches 13, 15) are nearly identi= cal =E2=80=94 should consider sharing --- --- Generated by Claude Code Patch Reviewer