[PATCH v1] drm/panel-edp: Add 2 panels used by MT8186 Chromebooks

[PATCH v1] drm/panel-edp: Add 2 panels used by MT8186 Chromebooks

[Terry Hsiao]

The raw EDIDs for each panel:

CSW
- PNB601LS1-2
00 ff ff ff ff ff ff 00 0e 77 0a 11 00 00 00 00
30 23 01 04 a5 1a 0e 78 03 a1 35 9b 5e 58 91 25
1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 09 1e 56 dc 50 00 28 30 30 20
36 00 00 90 10 00 00 1a 06 14 56 dc 50 00 28 30
30 20 36 00 00 90 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0c 3d ff 0c 3c 7d 0e 0b 17 7d 00 00 00 00 e8

LGD
- LP116WHA-SPB1
00 ff ff ff ff ff ff 00 30 e4 fe 07 01 01 00 00
00 24 01 04 a5 1a 0e 78 03 72 e5 9c 5e 5b 94 27
19 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 d5 21 56 a0 50 00 b2 30 30 20
f8 0c 00 90 10 00 00 1a 8e 16 56 a0 50 00 b2 30
30 20 f8 0c 00 90 10 00 00 1a 00 00 00 fd 00 28
3c 39 39 09 01 0a 20 20 20 20 20 20 00 00 00 02
00 0f 3d ff 0f 3c 7d 0d 0a 15 7d 00 00 00 01 da

70 20 79 02 00 25 00 09 57 52 01 57 52 01 28 3c
80 81 00 15 74 1a 00 00 03 01 28 3c 00 00 4a 5a
4a 5a 3c 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 ef 90

Signed-off-by: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com>
---
 drivers/gpu/drm/panel/panel-edp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index 497dcd48f57b..7d80524a9406 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -2072,6 +2072,7 @@ static const struct edp_panel_entry edp_panels[] = {
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"),
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"),
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"),
+	EDP_PANEL_ENTRY('C', 'S', 'W', 0x110A, &delay_200_500_e50, "PNB601LS1-2"),
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x143f, &delay_200_500_e50, "MNE007QS3-6"),
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"),
 	EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"),
@@ -2119,6 +2120,7 @@ static const struct edp_panel_entry edp_panels[] = {
 	EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"),
 	EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"),
 	EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"),
+	EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"),
 
 	EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
 	EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"),
-- 
2.34.1

Claude review: drm/panel-edp: Add 2 panels used by MT8186 Chromebooks

[Claude Code Review Bot]

Overall Series Review

Subject: drm/panel-edp: Add 2 panels used by MT8186 Chromebooks
Author: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com>
Patches: 1
Reviewed: 2026-03-25T07:01:00.574567

---

This is a straightforward single patch adding two new eDP panel entries for MT8186 Chromebooks. The EDID product IDs match the raw EDID data provided in the commit message, the entries are inserted in correct sorted order, and the delay structs used are consistent with other panels from the same manufacturers.

**Verdict: Looks good overall, one minor question on delay choice for the CSW panel.**

---
Generated by Claude Code Patch Reviewer

Claude review: drm/panel-edp: Add 2 panels used by MT8186 Chromebooks

[Claude Code Review Bot]

Patch Review

**EDID verification:**
- **CSW PNB601LS1-2**: EDID bytes 8-9 = `0e 77` (CSW), product code bytes 10-11 = `0a 11` → little-endian = `0x110A`. Matches the entry.
- **LGD LP116WHA-SPB1**: EDID bytes 8-9 = `30 e4` (LGD), product code bytes 10-11 = `fe 07` → little-endian = `0x07FE`. Matches the entry.

**Sort order:** Both entries are inserted in the correct hex-sorted position within their manufacturer groups.

**Delay values:**
- The LGD entry uses `&delay_200_500_e200_d200`, which is consistent with every other LGD panel in the table. No concerns there.
- The CSW entry uses `&delay_200_500_e50`. The other CSW panels in the MNB601LS1 family use different delays:
  - `0x1100` MNB601LS1-1 → `delay_200_500_e80_d50`
  - `0x1103` MNB601LS1-3 → `delay_200_500_e80_d50`
  - `0x1104` MNB601LS1-4 → `delay_200_500_e50_d100`

  The new PNB601LS1-2 uses `delay_200_500_e50` (no deassert delay). This is a different panel family name prefix (PNB vs MNB), so different timing could be expected, but it would be good for the author to confirm the power-off-to-on delay (`d`) and enable delay (`e`) values were verified against the panel datasheet.

**Minor nit:** The commit subject says "2 panels" but doesn't mention the specific platform context in the diff itself. This is fine for a panel-edp data patch.

**No functional issues found.** The patch is correct and ready to merge, assuming the delay values for the CSW panel have been validated on hardware.

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Generated by Claude Code Patch Reviewer