From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: Improvements on RZ/G2L MIPI DSI driver Date: Tue, 31 Mar 2026 17:20:05 +1000 Message-ID: In-Reply-To: <20260330104450.128512-1-biju.das.jz@bp.renesas.com> References: <20260330104450.128512-1-biju.das.jz@bp.renesas.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: Improvements on RZ/G2L MIPI DSI driver Author: Biju Patches: 4 Reviewed: 2026-03-31T17:20:05.256307 --- This is a well-structured 3-patch series that brings the RZ/G2L MIPI DSI driver into conformance with the hardware manual (Rev. 1.50, Section 34.4.2.1). The changes are: 1. Move display timing setup to after HS clock start 2. Fix the reset deassertion delay from 1 usec to 1 msec 3. Move CMN_RSTB deassert/assert to the correct points in the startup/stop sequence The series is logically ordered and the patches are appropriately separated. Patches 1 and 2 carry Fixes tags and Cc: stable, which is appropriate. The overall approach is sound and the code changes are small and targeted. **One concern spans patches 1 and 3**: the return value of `rzg2l_mipi_dsi_startup()` is silently dropped in `rzg2l_mipi_dsi_atomic_pre_enable()` after patch 1. This was already the case before patch 1 (the original code had `if (ret < 0) return;` which just returned void), but patch 1 makes it more explicit by removing the check entirely. This isn't a regression introduced by this series, but it's worth noting. --- --- Generated by Claude Code Patch Reviewer