From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/amdgpu: replace PASID IDR with XArray Date: Tue, 31 Mar 2026 16:57:38 +1000 Message-ID: In-Reply-To: <20260330191120.105065-1-mikhail.v.gavrilov@gmail.com> References: <20260330191120.105065-1-mikhail.v.gavrilov@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/amdgpu: replace PASID IDR with XArray Author: Mikhail Gavrilov Patches: 3 Reviewed: 2026-03-31T16:57:38.374656 --- This is a single v5 patch converting amdgpu's PASID allocator from IDR+spin= lock to XArray, fixing two real bugs introduced by commit 8f1de51f49be: sle= eping under spinlock and a process/hardirq lock deadlock. The conversion is= clean and well-motivated, but **the patch has a remaining deadlock vulnera= bility** =E2=80=94 the same class of bug it's trying to fix. The core issue: `xa_alloc_cyclic()` uses plain `xa_lock()` internally (IRQs= remain enabled), while `amdgpu_pasid_free()` correctly uses `xa_lock_irqsa= ve()`. If a hardirq fires on the same CPU while `xa_alloc_cyclic()` holds t= he xa_lock, and the IRQ handler calls `amdgpu_pasid_free()` =E2=86=92 `xa_l= ock_irqsave()`, it will deadlock on the already-held lock =E2=80=94 exactly= the same pattern as the original bug. **The fix is straightforward**: use `xa_alloc_cyclic_irq()` instead of `xa_= alloc_cyclic()`. This variant (at `include/linux/xarray.h:1054`) takes and = releases the xa_lock while disabling interrupts, which prevents the deadloc= k. --- Generated by Claude Code Patch Reviewer