Claude review: accel/amdxdna: Read real-time clock frequencies

[Claude Code Review Bot <claude-review@example.com>]

Overall Series Review

Subject: accel/amdxdna: Read real-time clock frequencies
Author: Lizhi Hou <lizhi.hou@amd.com>
Patches: 2
Reviewed: 2026-04-12T14:21:09.757535

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This is a single patch that bundles two logically distinct changes:

1. **Refactoring `hw_ops` from an embedded struct to a const pointer** — enabling sharing of the ops struct across NPU generations and making `npu4_set_dpm` static.
2. **Adding a new `update_counters` callback** that reads real-time clock frequencies from the AMD PMF (Platform Management Framework) interface.

The refactoring is clean and well-motivated: npu5 and npu6 already reused `npu4_set_dpm`, so sharing a single `npu4_hw_ops` const struct is the right consolidation. However, kernel convention strongly favors splitting these into at least two patches (refactor first, new feature second) for easier bisection and review.

The core concern is the **field name mapping** in `npu4_update_counters` between PMF metrics fields and driver fields, which is confusing and needs explicit justification. There are also issues around silent error suppression and a missing `max_tops` update in the new callback.

**Overall: Needs revision.** The approach is sound but the naming confusion warrants clarification, the error handling in the macro should be addressed, and the patch should ideally be split.

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