From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/panthor: Localize register access by component Date: Mon, 13 Apr 2026 19:05:51 +1000 Message-ID: In-Reply-To: <20260412142951.2309135-1-karunika.choo@arm.com> References: <20260412142951.2309135-1-karunika.choo@arm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/panthor: Localize register access by component Author: Karunika Choo Patches: 13 Reviewed: 2026-04-13T19:05:51.523061 --- This is a well-structured refactoring series that localizes register access= es in the panthor driver by giving each component (GPU, PWR, FW, MMU) its o= wn `void __iomem *` base pointer instead of routing all accesses through `p= tdev->iomem`. The series proceeds in logical steps: 1. First, make `gpu_read`/`gpu_write` helpers take a raw `void __iomem *` (= patch 1) 2. Split the monolithic register header by component (patch 2) 3. Eliminate cross-component register accesses (patch 3) 4. Generalize IRQ register handling (patch 4) 5. Then convert each component one at a time (patches 5=E2=80=938) The register address arithmetic is correct throughout =E2=80=94 I verified = the base offsets (GPU_CONTROL at 0x0, MCU_CONTROL at 0x700, PWR_CONTROL at = 0x800, MMU_AS at 0x2400) and the rebased per-component register defines. In= itialization ordering is safe: `panthor_gpu_init()` runs before `panthor_gp= u_coherency_init()`, so `ptdev->gpu->iomem` is valid when needed. **Overall verdict:** This is a clean, mechanical refactoring with no functi= onal changes. The series is ready to merge with minor observations noted be= low. The patches that already have Boris Brezillon's Acked-by (1, 7, 8) loo= k correct, and the remaining patches are equally sound. **One pre-existing bug noted** (not introduced by this series): `panthor_pw= r_l2_power_on()` truncates a 64-bit register read to `u32`. --- --- Generated by Claude Code Patch Reviewer